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Merge pull request #2001 from whitequark/wasi
whitequark
2020-05-01
1
-1
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+1
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Add WASI platform support.
whitequark
2020-04-30
1
-1
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+1
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Merge pull request #1981 from YosysHQ/claire/fix1837
Claire Wolf
2020-05-01
1
-0
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+4
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Clear current_scope when done with RTLIL generation, fixes #1837
Claire Wolf
2020-04-22
1
-0
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+4
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verific: ignore anonymous enums
Eddie Hung
2020-04-30
1
-1
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+4
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verific: support VHDL enums too
Eddie Hung
2020-04-27
1
-13
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+43
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verific: recover wiretype/enum attr as part of import_attributes()
Eddie Hung
2020-04-27
2
-6
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+35
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Revert "verific: import enum attributes from verific"
Eddie Hung
2020-04-24
1
-24
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+0
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verific: do not assert if wire not found; warn instead
Eddie Hung
2020-04-23
1
-2
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+6
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verific: import enum attributes from verific
Eddie Hung
2020-04-22
1
-0
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+20
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ilang, ast: Store parameter order and default value information.
Marcelina KoĆcielnicka
2020-04-21
3
-5
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+13
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Merge pull request #1851 from YosysHQ/claire/bitselwrite
Claire Wolf
2020-04-21
4
-15
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+207
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Make mask-and-shift the default for bitselwrite
Claire Wolf
2020-04-16
1
-1
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+1
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Add LookaheadRewriter for proper bitselwrite support
Claire Wolf
2020-04-16
4
-4
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+144
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Improved rewrite code for writing to bit slice (disabled for now)
Claire Wolf
2020-04-15
1
-12
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+64
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Merge pull request #1961 from whitequark/paramod-original-name
whitequark
2020-04-21
2
-0
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+5
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ast, rpc: record original name of $paramod\* as \hdlname attribute.
whitequark
2020-04-18
2
-0
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+5
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Extend support for format strings in Verilog front-end
Claire Wolf
2020-04-18
1
-8
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+38
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Set Verilog source location for explicit blocks (`begin` ... `end`).
Alberto Gonzalez
2020-04-17
1
-0
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+1
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Add Verilog source location information to `AST_POSEDGE` and `AST_NEGEDGE` no...
Alberto Gonzalez
2020-04-17
1
-0
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+2
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Add location information to `AST_CONSTANT` nodes.
Alberto Gonzalez
2020-04-16
1
-0
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+3
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ast: Fix handling of identifiers in the global scope
David Shah
2020-04-16
2
-2
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+7
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Merge pull request #1918 from whitequark/simplify-improve_enum
whitequark
2020-04-15
1
-5
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+3
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ast/simplify: improve enum handling.
whitequark
2020-04-15
1
-5
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+3
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Fix 5bba9c3, closes #1876
Claire Wolf
2020-04-14
1
-7
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+13
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Merge pull request #1879 from jjj11x/jjj11x/package_decl
whitequark
2020-04-14
2
-1
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+25
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support using previously declared types/localparams/params in package
Jeff Wang
2020-04-07
2
-1
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+25
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Merge pull request #1880 from jjj11x/duplicate_enum
whitequark
2020-04-14
1
-2
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+3
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duplicated enum item names should result in an error
Jeff Wang
2020-04-07
1
-2
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+3
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Merge pull request #1910 from boqwxp/cleanup_ilang_parser
whitequark
2020-04-13
1
-4
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+4
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Clean up pseudo-private member usage in `frontends/ilang/ilang_parser.y`.
Alberto Gonzalez
2020-04-13
1
-4
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+4
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verilog: Fix write to deleted object
David Shah
2020-04-12
1
-1
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+0
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Merge pull request #1875 from whitequark/read_ilang-int_overflow
whitequark
2020-04-09
2
-2
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+14
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read_ilang: improve style. NFC.
whitequark
2020-04-06
1
-2
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+1
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read_ilang: improve error message for overly long wires.
whitequark
2020-04-06
1
-0
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+3
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read_ilang: detect overflow of integer literals.
whitequark
2020-04-06
1
-1
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+11
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aigerparse: only define __STDC_FORMAT_MACROS it not already before.
Henner Zeller
2020-04-07
1
-0
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+2
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Merge pull request #1853 from YosysHQ/eddie/fix_dynslice
Eddie Hung
2020-04-02
1
-1
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+2
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ast: cap dynamic range select to size of signal, suppresses warnings
Eddie Hung
2020-04-01
1
-1
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+2
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Merge pull request #1767 from YosysHQ/eddie/idstrings
Eddie Hung
2020-04-02
9
-449
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+437
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kernel: big fat patch to use more ID::*, otherwise ID(*)
Eddie Hung
2020-04-02
8
-313
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+301
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kernel: use more ID::*
Eddie Hung
2020-04-02
9
-142
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+142
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Merge pull request #1846 from dh73/ast_fe
Claire Wolf
2020-04-02
1
-0
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+3
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Replacing log_error for log_file_error due consistency
Diego H
2020-03-31
1
-2
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+1
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Adding error message for when size (width) of number literal is zero
Diego H
2020-03-30
1
-0
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+4
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Merge pull request #1845 from YosysHQ/eddie/kernel_speedup
Eddie Hung
2020-04-02
3
-38
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+44
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kernel: more pass by const ref, more speedups
Eddie Hung
2020-03-18
3
-38
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+44
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Merge pull request #1844 from YosysHQ/dave/gen-source-loc
David Shah
2020-04-01
1
-0
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+6
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verilog: Add location info for generate constructs
David Shah
2020-04-01
1
-0
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+6
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Merge pull request #1848 from YosysHQ/eddie/fix_dynslice
Claire Wolf
2020-04-01
1
-1
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+1
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