aboutsummaryrefslogtreecommitdiffstats
path: root/frontends
Commit message (Expand)AuthorAgeFilesLines
* Update READMEClaire Xen2021-03-041-4/+4
* verilog: fix sizing of ports with int types in module headersZachary Snow2021-03-011-2/+3
* verilog: fix handling of nested ifdef directivesZachary Snow2021-03-011-11/+38
* Merge pull request #2523 from tomverbeure/define_synthesisClaire Xen2021-03-011-3/+12
|\
| * Fix indents.Tom Verbeure2021-01-041-2/+2
| * Add -nosynthesis flag for read_verilog command.Tom Verbeure2021-01-041-3/+12
* | Merge pull request #2615 from zachjs/genrtlil-conflictwhitequark2021-03-011-12/+37
|\ \
| * | genrtlil: improve name conflict error messagingZachary Snow2021-02-261-12/+37
* | | sv: extended support for integer typesZachary Snow2021-02-282-39/+70
* | | Implement $countones, $isunknown and $onehot{,0}Michael Singer2021-02-261-0/+28
* | | Implement $countbits functionMichael Singer2021-02-261-0/+59
* | | Extend simplify() recursion warningZachary Snow2021-02-261-1/+1
* | | Merge pull request #2554 from hzeller/masterwhitequark2021-02-251-6/+17
|\ \ \
| * | | Provide an integer implementation of decimal_digits().Henner Zeller2021-02-011-2/+9
| * | | Fix digit-formatting calculation for small numbers.Henner Zeller2021-01-211-6/+10
* | | | Fix handling of unique/unique0/priority cases in the frontend.Marcelina Kościelnicka2021-02-252-15/+16
| |/ / |/| |
* | | Extend "delay" expressions to handle pair and triplet, i.e. rise, fall and tu...TimRudy2021-02-241-2/+7
* | | frontend: Make helper functions for printing locations.Marcelina Kościelnicka2021-02-234-57/+71
* | | Merge pull request #2594 from zachjs/func-arg-widthwhitequark2021-02-232-10/+30
|\ \ \
| * | | verilog: fix sizing of constant args for tasks/functionsZachary Snow2021-02-212-10/+30
* | | | frontend: json: parse negative valuesKarol Gugala2021-02-231-2/+10
* | | | Merge pull request #2586 from zachjs/tern-recursewhitequark2021-02-213-19/+119
|\ \ \ \
| * | | | verilog: support recursive functions using ternary expressionsZachary Snow2021-02-123-19/+119
* | | | | verilog: error on macro invocations with missing argument listsZachary Snow2021-02-191-1/+10
| |/ / / |/| | |
* | | | Merge pull request #2574 from dh73/masterClaire Xen2021-02-151-0/+5
|\ \ \ \ | |/ / / |/| | |
| * | | Accept disable case for SVA liveness properties.Diego H2021-02-041-0/+5
* | | | Ganulate Verific supportMiodrag Milanovic2021-02-121-8/+16
* | | | Merge pull request #2573 from zachjs/repeat-callwhitequark2021-02-112-72/+82
|\ \ \ \
| * | | | verilog: refactored constant function evaluationZachary Snow2021-02-042-72/+82
| |/ / /
* | | | Merge pull request #2578 from zachjs/genblk-portZachary Snow2021-02-111-4/+7
|\ \ \ \
| * | | | verlog: allow shadowing module ports within generate blocksZachary Snow2021-02-071-4/+7
* | | | | Add missing is_signed to type_atomKamil Rakoczy2021-02-111-4/+4
|/ / / /
* | | | genrtlil: fix signed port connection codegen failuresZachary Snow2021-02-051-1/+5
* | | | Add check of begin/end labels for genblockKamil Rakoczy2021-02-041-0/+2
|/ / /
* | | Merge pull request #2529 from zachjs/unnamed-genblkwhitequark2021-02-043-148/+169
|\ \ \
| * | | verilog: significant block scoping improvementsZachary Snow2021-01-313-148/+169
* | | | Require latest Verific buildMiodrag Milanovic2021-01-301-1/+1
* | | | ast: fix dump_vlog display of casex/casezMarcelina Kościelnicka2021-01-291-2/+2
* | | | verilog: strip leading and trailing spaces in macro argsZachary Snow2021-01-281-1/+5
|/ / /
* | | Merge pull request #2550 from zachjs/macro-arg-spaceswhitequark2021-01-251-1/+0
|\ \ \
| * | | verilog: allow spaces in macro argumentsZachary Snow2021-01-201-1/+0
* | | | dpi: Support for chandle typeDavid Shah2021-01-231-1/+16
| |/ / |/| |
* | | Allow combination of rand and const modifiersZachary Snow2021-01-211-2/+10
* | | Switch verific bindings from Symbiotic EDA flavored Verific to YosysHQ flavor...Claire Xenia Wolf2021-01-201-18/+18
* | | sv: fix support wire and var data type modifiersZachary Snow2021-01-201-9/+23
|/ /
* | Fix input/output attributes when resolving typedef of wireKamil Rakoczy2021-01-181-0/+3
* | Parse package user type in module port listLukasz Dalek2021-01-181-30/+32
|/
* Merge pull request #2518 from zachjs/recursionwhitequark2021-01-012-8/+28
|\
| * verilog: improved support for recursive functionsZachary Snow2020-12-312-8/+28
* | sv: complete support for implied task/function port directionsZachary Snow2020-12-311-0/+10
|/
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-03 08:31:08 +0000