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| author | Zachary Snow <zach@zachjs.com> | 2021-01-20 08:49:32 -0700 |
|---|---|---|
| committer | Zachary Snow <zach@zachjs.com> | 2021-01-20 08:49:58 -0700 |
| commit | 4fadcc8f25d5ef1e494aa7d5e49d893afdaa1705 (patch) | |
| tree | a9a800ae8beb09260763e122371f009eda689b23 /frontends | |
| parent | 4762cc06c6b7cd36dda2e6eddf15b9782334ccd4 (diff) | |
| download | yosys-4fadcc8f25d5ef1e494aa7d5e49d893afdaa1705.tar.gz yosys-4fadcc8f25d5ef1e494aa7d5e49d893afdaa1705.tar.bz2 yosys-4fadcc8f25d5ef1e494aa7d5e49d893afdaa1705.zip | |
verilog: allow spaces in macro arguments
Diffstat (limited to 'frontends')
| -rw-r--r-- | frontends/verilog/preproc.cc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/frontends/verilog/preproc.cc b/frontends/verilog/preproc.cc index 752f7a7a8..5a2804a41 100644 --- a/frontends/verilog/preproc.cc +++ b/frontends/verilog/preproc.cc @@ -392,7 +392,6 @@ static bool read_argument(std::string &dest) { std::vector<char> openers; for (;;) { - skip_spaces(); std::string tok = next_token(true); if (tok == ")") { if (openers.empty()) |