| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Merge pull request #1233 from YosysHQ/clifford/defer | Clifford Wolf | 2019-07-31 | 1 | -1/+2 |
| |\ | | | | | Call "read_verilog" with -defer from "read" | ||||
| | * | Call "read_verilog" with -defer from "read" | Clifford Wolf | 2019-07-29 | 1 | -1/+2 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | verilog_lexer: Increase YY_BUF_SIZE to 65536 | David Shah | 2019-07-26 | 1 | -0/+3 |
| |/ | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | initialize noblackbox and nowb in AstModule::clone | Jakob Wenzel | 2019-07-22 | 1 | -0/+2 |
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| * | Fix typo, double "of" | Miodrag Milanovic | 2019-07-16 | 1 | -1/+1 |
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| * | Fix missing semicolon in Windows-specific code in aigerparse.cc. | William D. Jones | 2019-07-14 | 1 | -2/+2 |
| | | | | | Signed-off-by: William D. Jones <thor0505@comcast.net> | ||||
| * | genrtlil: emit \src attribute on CaseRule. | whitequark | 2019-07-08 | 1 | -0/+1 |
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| * | Allow attributes on individual switch cases in RTLIL. | whitequark | 2019-07-08 | 1 | -4/+9 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The parser changes are slightly awkward. Consider the following IL: process $0 <point 1> switch \foo <point 2> case 1'1 assign \bar \baz <point 3> ... case end end Before this commit, attributes are valid in <point 1>, and <point 3> iff it is immediately followed by a `switch`. (They are essentially attached to the switch.) But, after this commit, and because switch cases do not have an ending delimiter, <point 3> becomes ambiguous: the attribute could attach to either the following `case`, or to the following `switch`. This isn't expressible in LALR(1) and results in a reduce/reduce conflict. To address this, attributes inside processes are now valid anywhere inside the process: in <point 1> and <point 3> a part of case body, and in <point 2> as a separate rule. As a consequence, attributes can now precede `assign`s, which is made illegal in the same way it is illegal to attach attributes to `connect`. Attributes are tracked separately from the parser state, so this does not affect collection of attributes at all, other than allowing them on `case`s. The grammar change serves purely to allow attributes in more syntactic places. | ||||
| * | Merge pull request #1147 from YosysHQ/clifford/fix1144 | Clifford Wolf | 2019-07-03 | 1 | -81/+14 |
| |\ | | | | | Improve specify dummy parser | ||||
| | * | Some cleanups in "ignore specify parser" | Clifford Wolf | 2019-07-03 | 1 | -79/+5 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | Improve specify dummy parser, fixes #1144 | Clifford Wolf | 2019-06-28 | 1 | -2/+9 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | Fix segfault on failed VERILOG_FRONTEND::const2ast, closes #1131 | Clifford Wolf | 2019-06-26 | 1 | -1/+1 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Fix read_verilog assert/assume/etc on default case label, fixes ↵ | Clifford Wolf | 2019-07-02 | 1 | -0/+2 |
| | | | | | | | | | | | | | YosysHQ/SymbiYosys#53 Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | Replace log_assert() with meaningful log_error() | Eddie Hung | 2019-06-28 | 1 | -1/+5 |
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| * | | Refactor for one "abc_carry" attribute on module | Eddie Hung | 2019-06-27 | 1 | -31/+37 |
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| * | | Remove unneeded include | Eddie Hung | 2019-06-27 | 1 | -3/+0 |
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| * | | Merge origin/master | Eddie Hung | 2019-06-27 | 1 | -1/+1 |
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| * | | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-06-24 | 1 | -0/+12 |
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| | * | Add upto and offset to JSON ports | Miodrag Milanovic | 2019-06-21 | 1 | -0/+12 |
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| * | | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-06-21 | 3 | -6/+19 |
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| | * | Fix typo | Miodrag Milanovic | 2019-06-21 | 1 | -1/+1 |
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| | * | Added JSON upto and offset | Clifford Wolf | 2019-06-21 | 1 | -0/+12 |
| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | Merge pull request #1119 from YosysHQ/eddie/fix1118 | Clifford Wolf | 2019-06-21 | 1 | -0/+1 |
| | |\ | | | | | | | Make genvar a signed type | ||||
| | | * | Make genvar a signed type | Eddie Hung | 2019-06-20 | 1 | -0/+1 |
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| | * | | Maintain "is_unsized" state of constants | Eddie Hung | 2019-06-20 | 1 | -6/+6 |
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| * | | Reduce log_debug spam in parse_xaiger() | Eddie Hung | 2019-06-21 | 1 | -16/+19 |
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| * | | Workaround issues exposed by gcc-4.8 | Eddie Hung | 2019-06-21 | 1 | -0/+7 |
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| * | | Fix broken abc9.v test due to inout being 1'bx | Eddie Hung | 2019-06-20 | 1 | -3/+10 |
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| * | | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-06-20 | 6 | -15/+77 |
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| | * | Merge branch 'unpacked_arrays' of https://github.com/towoe/yosys-sv into ↵ | Clifford Wolf | 2019-06-20 | 1 | -1/+7 |
| | |\ | | | | | | | | | | towoe-unpacked_arrays | ||||
| | | * | Unpacked array declaration using size | Tobias Wölfel | 2019-06-19 | 1 | -1/+7 |
| | | | | | | | | | | | | | | | | | | | | | | | | | Allows fixed-sized array dimension specified by a single number. This commit is based on the work from PeterCrozier https://github.com/YosysHQ/yosys/pull/560. But is split out of the original work. | ||||
| | * | | Add "read_verilog -pwires" feature, closes #1106 | Clifford Wolf | 2019-06-19 | 5 | -9/+44 |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | | Add defaultvalue attribute | Clifford Wolf | 2019-06-19 | 1 | -0/+11 |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | | Fix handling of "logic" variables with initial value | Clifford Wolf | 2019-06-19 | 1 | -2/+2 |
| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| | * | | Fixed brojen $error()/$info/$warning() on non-generate blocks | Udi Finkelstein | 2019-06-11 | 2 | -3/+13 |
| | |/ | | | | | | | (within always/initial blocks) | ||||
| * | | Fix issue with part of PI being 1'bx | Eddie Hung | 2019-06-20 | 1 | -4/+6 |
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| * | | Cleanup | Eddie Hung | 2019-06-16 | 1 | -20/+1 |
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| * | | Cover __APPLE__ too for little to big endian | Eddie Hung | 2019-06-14 | 1 | -4/+7 |
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| * | | Further cleanup based on @daveshah1 | Eddie Hung | 2019-06-14 | 1 | -10/+20 |
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| * | | Resolve comments from @daveshah1 | Eddie Hung | 2019-06-14 | 1 | -2/+2 |
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| * | | Cleanup | Eddie Hung | 2019-06-14 | 1 | -7/+3 |
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| * | | Add TODO to parse_xaiger | Eddie Hung | 2019-06-14 | 1 | -0/+1 |
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| * | | Optimise some more | Eddie Hung | 2019-06-13 | 1 | -58/+53 |
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| * | | Move ConstEvalAig to aigerparse.cc | Eddie Hung | 2019-06-13 | 1 | -3/+161 |
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| * | | Add ConstEvalAig specialised for AIGs | Eddie Hung | 2019-06-13 | 1 | -3/+2 |
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| * | | parse_xaiger to cope with inouts | Eddie Hung | 2019-06-12 | 1 | -6/+0 |
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| * | | Consistency | Eddie Hung | 2019-06-12 | 2 | -2/+2 |
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| * | | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-06-12 | 16 | -957/+1462 |
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| | * | Fix spacing from spaces to tabs | Eddie Hung | 2019-06-07 | 1 | -362/+362 |
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| | * | Fix spacing (entire file is wrong anyway, will fix later) | Eddie Hung | 2019-06-07 | 1 | -3/+3 |
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