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* Merge pull request #3206 from YosysHQ/micko/quote_removeMiodrag Milanović2022-03-041-1/+4
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| * Remove quotes if any from attributeMiodrag Milanovic2022-02-161-1/+4
* | fix handling of escaped chars in json backend and frontendN. Engelhardt2022-02-181-3/+31
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* verilog: support for time scale delay valuesZachary Snow2022-02-142-4/+16
* Fix access to whole sub-structs (#3086)Kamil Rakoczy2022-02-142-6/+18
* verilog: fix dynamic dynamic range asgn elabZachary Snow2022-02-111-17/+34
* verilog: fix const func eval with upto variablesZachary Snow2022-02-112-3/+11
* Merge pull request #3164 from zachjs/fix-ast-warnMiodrag Milanović2022-02-111-1/+1
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| * fix dumpAst() compilation warningZachary Snow2022-01-181-1/+1
* | Add ability to override verilog mode for verific -f commandMiodrag Milanovic2022-02-091-2/+44
* | Use bmux for NTO1MUXMiodrag Milanovic2022-02-021-16/+2
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* sv: auto add nosync to certain always_comb local varsZachary Snow2022-01-071-0/+127
* sv: fix size cast internal expression extensionZachary Snow2022-01-071-2/+9
* sv: fix size cast clipping expression widthZachary Snow2022-01-031-1/+2
* fix width detection of array querying function in case and case item expressionsZachary Snow2021-12-172-2/+5
* preprocessor: do not destroy double slash escaped identifiersThomas Sailer2021-12-151-0/+10
* Add YOSYS to the implicitly defined verilog macros in verificClaire Xenia Wolf2021-12-131-1/+2
* Merge pull request #3102 from YosysHQ/claire/enumxzMiodrag Milanović2021-12-101-1/+1
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| * Fix verific import of enum values with x and/or zClaire Xenia Wolf2021-12-101-1/+1
* | Update verific.ccClaire Xen2021-12-101-4/+7
* | If direction NONE use that from first bitMiodrag Milanovic2021-12-081-0/+7
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* Make sure cell names are unique for wide operatorsMiodrag Milanovic2021-12-031-2/+2
* Support parameters using struct as a wiretype (#3050)Kamil Rakoczy2021-11-161-7/+23
* No need to alocate more memory than usedMiodrag Milanovic2021-11-101-1/+0
* genrtlil: Fix displaying debug info in packagesKamil Rakoczy2021-11-101-1/+2
* Add "verific -cfg" commandClaire Xenia Wolf2021-11-011-2/+75
* Fix verific gclk handling for async-load FFsClaire Xenia Wolf2021-10-311-12/+67
* Enable async load dff emit by default in VerificMiodrag Milanovic2021-10-271-1/+1
* Revert "Compile option for enabling async load verific support"Miodrag Milanovic2021-10-271-4/+1
* verilog: use derived module info to elaborate cell connectionsZachary Snow2021-10-254-41/+291
* Split out logic for reprocessing an AstModuleRupert Swarbrick2021-10-252-24/+57
* Compile option for enabling async load verific supportMiodrag Milanovic2021-10-251-1/+4
* Fix verific.cc PRIM_DLATCH handlingClaire Xenia Wolf2021-10-211-1/+7
* Initial Verific impoter support for {PRIM,WIDE_OPER}_DLATCH{,RS}Claire Xenia Wolf2021-10-211-4/+55
* Option to disable verific VHDL supportMiodrag Milanovic2021-10-202-11/+45
* Support PRIM_BUFIF1 primitiveMiodrag Milanovic2021-10-141-2/+2
* Merge pull request #3039 from YosysHQ/claire/verific_aldffClaire Xen2021-10-112-1/+91
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| * Add Verific adffe/dffsre/aldffe FIXMEsClaire Xenia Wolf2021-10-111-0/+3
| * Fixes and add comments for open FIXME itemsClaire Xenia Wolf2021-10-081-1/+34
| * Add support for $aldff flip-flops to verific importerClaire Xenia Wolf2021-10-082-1/+55
* | Import module attributes from VerificMiodrag Milanovic2021-10-101-0/+1
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* verific set db_infer_set_reset_registersMiodrag Milanovic2021-10-041-0/+1
* Specify minimum bison version 3.0+Zachary Snow2021-10-012-0/+4
* Merge pull request #3014 from YosysHQ/claire/fix-vgtestClaire Xen2021-09-241-0/+1
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| * Fix TOK_ID memory leak in for_initializationZachary Snow2021-09-231-0/+1
* | sv: support wand and wor of data typesZachary Snow2021-09-211-9/+12
* | verilog: fix multiple AST_PREFIX scope resolution issuesZachary Snow2021-09-212-4/+10
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* verilog: Squash flex-triggered warning.Marcelina Kościelnicka2021-09-131-0/+2
* update required verific versionMiodrag Milanovic2021-09-021-1/+1
* sv: support declaration in generate for initializationZachary Snow2021-08-311-1/+95
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