diff options
| author | Miodrag Milanovic <mmicko@gmail.com> | 2021-10-14 13:04:32 +0200 |
|---|---|---|
| committer | Miodrag Milanovic <mmicko@gmail.com> | 2021-10-14 13:04:32 +0200 |
| commit | 1aa68969660549ae9c0fd683c0a328c499694b49 (patch) | |
| tree | eefbbc9a20f6b714183891ccab21f57f08cb0a82 /frontends | |
| parent | a0f5ba850111c6edc471d070057fa07b073141f4 (diff) | |
| download | yosys-1aa68969660549ae9c0fd683c0a328c499694b49.tar.gz yosys-1aa68969660549ae9c0fd683c0a328c499694b49.tar.bz2 yosys-1aa68969660549ae9c0fd683c0a328c499694b49.zip | |
Support PRIM_BUFIF1 primitive
Diffstat (limited to 'frontends')
| -rw-r--r-- | frontends/verific/verific.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index 74638dc8d..fcacbd086 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -371,7 +371,7 @@ bool VerificImporter::import_netlist_instance_gates(Instance *inst, RTLIL::IdStr return true; } - if (inst->Type() == PRIM_TRI) { + if ((inst->Type() == PRIM_TRI) || (inst->Type() == PRIM_BUFIF1)) { module->addMuxGate(inst_name, RTLIL::State::Sz, net_map_at(inst->GetInput()), net_map_at(inst->GetControl()), net_map_at(inst->GetOutput())); return true; } @@ -497,7 +497,7 @@ bool VerificImporter::import_netlist_instance_cells(Instance *inst, RTLIL::IdStr return true; } - if (inst->Type() == PRIM_TRI) { + if ((inst->Type() == PRIM_TRI) || (inst->Type() == PRIM_BUFIF1)) { cell = module->addMux(inst_name, RTLIL::State::Sz, net_map_at(inst->GetInput()), net_map_at(inst->GetControl()), net_map_at(inst->GetOutput())); import_attributes(cell->attributes, inst); return true; |