diff options
author | Claire Xen <claire@clairexen.net> | 2021-09-24 17:50:34 +0200 |
---|---|---|
committer | GitHub <noreply@github.com> | 2021-09-24 17:50:34 +0200 |
commit | 0146d83ed8ae380916dab3924f071bd7ed7d8770 (patch) | |
tree | fb93661052a5a8785b3af8e95992e224bdb8aa1c /frontends | |
parent | 9432400ec8e24646a2a7a789574a20d038fef79a (diff) | |
parent | 9658d2e337a54fc06873de716d0ae5586ffd869b (diff) | |
download | yosys-0146d83ed8ae380916dab3924f071bd7ed7d8770.tar.gz yosys-0146d83ed8ae380916dab3924f071bd7ed7d8770.tar.bz2 yosys-0146d83ed8ae380916dab3924f071bd7ed7d8770.zip |
Merge pull request #3014 from YosysHQ/claire/fix-vgtest
Fix "make vgtest"
Diffstat (limited to 'frontends')
-rw-r--r-- | frontends/verilog/verilog_parser.y | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index 80b40f982..5eb1115ce 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -2677,6 +2677,7 @@ for_initialization: AstNode *node = new AstNode(AST_ASSIGN_EQ, ident, $3); ast_stack.back()->children.push_back(node); SET_AST_NODE_LOC(node, @1, @3); + delete $1; } | non_io_wire_type range TOK_ID { frontend_verilog_yyerror("For loop variable declaration is missing initialization!"); |