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Age
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*
Merge pull request #2885 from whitequark/cxxrtl-fix-2883
whitequark
2021-07-20
1
-2
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+8
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cxxrtl: treat wires with multiple defs as not inlinable.
whitequark
2021-07-20
1
-2
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+8
*
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cxxrtl: treat assignable internal wires used only for debug as locals.
whitequark
2021-07-20
1
-10
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+12
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cxxrtl: escape colon in variable names in VCD writer.
whitequark
2021-07-19
1
-1
/
+14
*
cxxrtl: add debug_item::{get,set}.
whitequark
2021-07-18
1
-0
/
+16
*
cxxrtl: treat internal wires used only for debug as constants.
whitequark
2021-07-17
1
-0
/
+6
*
Merge pull request #2874 from whitequark/cxxrtl-fix-2589
whitequark
2021-07-16
1
-9
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+6
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cxxrtl: run hierarchy pass regardless of (*top*) attribute presence.
whitequark
2021-07-16
1
-9
/
+6
*
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Merge pull request #2873 from whitequark/cxxrtl-fix-2500
whitequark
2021-07-16
1
-3
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+3
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cxxrtl: emit debug items for unused public wires.
whitequark
2021-07-16
1
-3
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+3
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cxxrtl: don't expect user cell inputs to be wires.
whitequark
2021-07-16
1
-2
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+2
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cxxrtl: don't mark buffered internal wires as UNUSED for debug.
whitequark
2021-07-16
1
-1
/
+1
*
cxxrtl: mark dead local wires as unused even with inlining disabled.
whitequark
2021-07-15
1
-4
/
+6
*
kernel/mem: Add a coalesce_inits helper.
Marcelina Kościelnicka
2021-07-13
1
-1
/
+5
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Add support for the Bitwuzla solver
GCHQDeveloper560
2021-07-12
1
-5
/
+5
*
cxxrtl: Support memory writes in processes.
Marcelina Kościelnicka
2021-07-12
1
-6
/
+55
*
cxxrtl: Add support for memory read port reset.
Marcelina Kościelnicka
2021-07-12
1
-1
/
+41
*
cxxrtl: Add support for mem read port initial data.
Marcelina Kościelnicka
2021-07-12
1
-4
/
+22
*
cxxrtl: Convert to Mem helpers.
Marcelina Kościelnicka
2021-07-12
1
-206
/
+276
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Intersynth URL
Claire Xenia Wolf
2021-06-09
1
-1
/
+1
*
Fixing old e-mail addresses and deadnames
Claire Xenia Wolf
2021-06-08
19
-20
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+20
*
Make a few passes auto-call Mem::narrow instead of rejecting wide ports.
Marcelina Kościelnicka
2021-05-28
3
-19
/
+6
*
backends/verilog: Add support for memory read port reset and init value.
Marcelina Kościelnicka
2021-05-27
1
-9
/
+81
*
backends/verilog: Add wide port support.
Marcelina Kościelnicka
2021-05-27
1
-43
/
+88
*
backends/verilog: Try to preserve mem write port priorities.
Marcelina Kościelnicka
2021-05-26
1
-32
/
+84
*
Reject wide ports in some passes that will never support them.
Marcelina Kościelnicka
2021-05-25
3
-2
/
+21
*
backend/firrtl: Convert to use Mem helpers.
Marcelina Kościelnicka
2021-05-24
1
-264
/
+88
*
btor: Use is_mem_cell in one more place.
Marcelina Kościelnicka
2021-05-23
1
-1
/
+1
*
kernel/rtlil: Extract some helpers for checking memory cell types.
Marcelina Kościelnicka
2021-05-22
3
-4
/
+4
*
abc9: fix SCC issues (#2694)
Eddie Hung
2021-03-29
1
-5
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+4
*
rtlil: Fix process memwr roundtrip.
Marcelina Kościelnicka
2021-03-23
1
-1
/
+1
*
json: Improve the "processes in module" message a bit.
Marcelina Kościelnicka
2021-03-23
1
-1
/
+1
*
json: Add support for memories.
Marcelina Kościelnicka
2021-03-15
1
-0
/
+42
*
Merge pull request #2642 from whitequark/cxxrtl-noproc-fixes
whitequark
2021-03-11
1
-17
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+29
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cxxrtl: don't assert on edge sync rules tied to a constant.
whitequark
2021-03-07
1
-0
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+4
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*
cxxrtl: allow `always` sync rules in debug_eval.
whitequark
2021-03-07
1
-17
/
+25
*
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Replace assert in xaiger with more useful error message
Dan Ravensloft
2021-03-10
1
-1
/
+2
*
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Add support for memory writes in processes.
Marcelina Kościelnicka
2021-03-08
1
-3
/
+20
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Merge pull request #2635 from whitequark/cxxrtl-memrd-async-addr
whitequark
2021-03-05
1
-1
/
+3
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*
cxxrtl: follow aliases to outlines when emitting $memrd.ADDR.
whitequark
2021-03-05
1
-1
/
+3
*
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Merge pull request #2634 from whitequark/cxxrtl-debug-wire-types
whitequark
2021-03-05
1
-0
/
+46
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*
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cxxrtl: add pass debug flag to show assigned wire types.
whitequark
2021-03-05
1
-0
/
+46
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*
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cxxrtl: don't crash on empty designs.
whitequark
2021-03-05
1
-1
/
+1
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/
*
btor, smt2, smv: Add a hint on how to deal with funny FF types.
Marcelina Kościelnicka
2021-02-25
3
-3
/
+42
*
Merge pull request #2563 from whitequark/cxxrtl-msvc
whitequark
2021-01-26
2
-10
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+10
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cxxrtl: do not use `->template` for non-dependent names.
whitequark
2021-01-26
2
-10
/
+10
*
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Improves the previous commit with a more complete coverage of the cases
Iris Johnson
2021-01-15
1
-12
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+12
*
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Handle sliced bits as clock inputs (fixes #2542)
Iris Johnson
2021-01-14
1
-3
/
+11
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add buffer option to spice backend
Pepijn de Vos
2021-01-13
1
-7
/
+15
*
cxxrtl: don't crash generating debug information for unused wires.
whitequark
2020-12-22
1
-9
/
+10
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