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Age
Files
Lines
*
Rename "write_verilog -nobasenradix" to "write_verilog -decimal"
Clifford Wolf
2017-10-03
1
-16
/
+13
*
Fixed wrong declaration in Verilog backend
dh73
2017-10-01
1
-3
/
+3
*
Adding Cyclone IV (E, GX), Arria 10, Cyclone V and LPM functions (ALTPLL and ...
dh73
2017-10-01
1
-3
/
+16
*
Fix bug in write_smt2 (export logic driving hierarchical cells before exporti...
Clifford Wolf
2017-08-25
1
-34
/
+34
*
Add "yosys-smtbmc --smtc-init --smtc-top --noinit"
Clifford Wolf
2017-08-04
1
-20
/
+66
*
Add verilator support to testbenches generated by yosys-smtbmc
Clifford Wolf
2017-07-21
1
-3
/
+15
*
Generate FSM-style testbenches in smtbmc
Clifford Wolf
2017-07-12
1
-5
/
+23
*
Fix the fixed handling of x-bits in EDIF back-end
Clifford Wolf
2017-07-11
1
-1
/
+0
*
Fix handling of x-bits in EDIF back-end
Clifford Wolf
2017-07-11
1
-1
/
+11
*
Add attributes and parameter support to JSON front-end
Clifford Wolf
2017-07-10
1
-0
/
+2
*
Change s/asserts/assertions/ in yosys-smtbmc log messages
Clifford Wolf
2017-07-07
1
-2
/
+2
*
Add "yosys-smtbmc --presat"
Clifford Wolf
2017-07-07
1
-3
/
+23
*
Fix generation of multiple outputs for same AIG node in write_aiger
Clifford Wolf
2017-07-05
1
-13
/
+30
*
Add write_table command
Clifford Wolf
2017-07-05
2
-0
/
+123
*
Remove unneeded delays in smtbmc vlogtb
Clifford Wolf
2017-07-03
1
-1
/
+1
*
Include output ports with constant driver in AIGER output
Clifford Wolf
2017-07-03
1
-2
/
+18
*
Add "yosys-smtbmc --vlogtb-top"
Clifford Wolf
2017-07-01
1
-15
/
+32
*
Fix smtbmc vlogtb bug in $anyseq handling
Clifford Wolf
2017-07-01
1
-3
/
+3
*
Fix generation of vlogtb output in yosys-smtbmc for "rand reg" and "rand cons...
Clifford Wolf
2017-06-07
3
-4
/
+53
*
Fix AIGER back-end for multiple symbols per input/latch/output/property
Clifford Wolf
2017-05-30
1
-8
/
+20
*
Improve write_aiger handling of unconnected nets and constants
Clifford Wolf
2017-05-28
1
-7
/
+61
*
Change default smt2 solver to yices (Yices 2 has switched its license to GPL)
Clifford Wolf
2017-05-27
1
-4
/
+4
*
Add workaround for CBMC bug to SimpleC back-end
Clifford Wolf
2017-05-17
1
-1
/
+3
*
Add $_ANDNOT_ and $_ORNOT_ gates
Clifford Wolf
2017-05-17
5
-14
/
+36
*
Add <modname>_init() function generator to simpleC back-end
Clifford Wolf
2017-05-16
2
-88
/
+152
*
Improve simplec back-end
Clifford Wolf
2017-05-16
1
-1
/
+1
*
Improve simplec back-end
Clifford Wolf
2017-05-15
1
-42
/
+44
*
Improve simplec back-end
Clifford Wolf
2017-05-14
3
-3
/
+49
*
Improve simplec back-end
Clifford Wolf
2017-05-13
1
-25
/
+60
*
Improve simplec back-end
Clifford Wolf
2017-05-12
3
-12
/
+78
*
Added support for more gate types to simplec back-end
Clifford Wolf
2017-05-12
1
-1
/
+88
*
Add first draft of simple C back-end
Clifford Wolf
2017-05-12
6
-0
/
+623
*
Fix boolector support in yosys-smtbmc
Clifford Wolf
2017-05-08
1
-18
/
+18
*
Add "write_smt2 -stdt" mode
Clifford Wolf
2017-03-20
2
-37
/
+84
*
Add generation of logic cells to EDIF back-end runtest.py
Clifford Wolf
2017-03-19
1
-2
/
+6
*
Fix EDIF: portRef member 0 is always the MSB bit
Clifford Wolf
2017-03-19
2
-13
/
+14
*
Add simple EDIF test case generator and checker
Clifford Wolf
2017-03-18
1
-0
/
+113
*
Improve smt2 encodings of assert/assume/cover, better wire_smt2 help msg
Clifford Wolf
2017-03-04
2
-33
/
+87
*
Add write_aiger $anyseq support
Clifford Wolf
2017-03-02
1
-0
/
+7
*
Use hex addresses in smtbmc vcd mem traces
Clifford Wolf
2017-02-28
1
-1
/
+1
*
Add smtbmc support for memory vcd dumping
Clifford Wolf
2017-02-26
1
-0
/
+98
*
Fix extra newline bug in write_smt2
Clifford Wolf
2017-02-26
1
-1
/
+1
*
Fix bug in smtio unroll code
Clifford Wolf
2017-02-26
1
-3
/
+2
*
Fix assert checking in "yosys-smtbmc -c --append"
Clifford Wolf
2017-02-26
1
-1
/
+1
*
Improve (and fix for stbv mode) SMT2 memory API
Clifford Wolf
2017-02-26
3
-47
/
+51
*
Add support for "yosys-smtbmc -c --append"
Clifford Wolf
2017-02-25
1
-1
/
+13
*
Improve "write_edif" help message
Clifford Wolf
2017-02-25
1
-7
/
+2
*
Move EdifNames out of double-private namespace
Clifford Wolf
2017-02-25
1
-48
/
+45
*
Clean up edif code, swap bit indexing of "upto" ports
Clifford Wolf
2017-02-25
1
-17
/
+35
*
Merge branch 'master' of https://github.com/klammerj/yosys into klammerj-master
Clifford Wolf
2017-02-25
1
-6
/
+46
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