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* cxxrtl: make logging a little bit nicer.whitequark2020-05-261-2/+10
* cxxrtl: add missing parts of commit 281c9685.whitequark2020-05-261-5/+3
* cxxrtl: get rid of -O5 aka `opt_clean -purge` optimization level.whitequark2020-05-221-8/+2
* Reorder cases to avoid fall-through warningXiretza2020-05-071-3/+3
* Add YS_FALLTHROUGH macro to mark case fall-throughXiretza2020-05-071-0/+6
* cxxrtl: Round up constant widthDavid Shah2020-04-251-1/+1
* cxxrtl: use `cxxrtl_` prefix rather than `cxxrtl.`whitequark2020-04-241-45/+45
* cxxrtl: improve printing of narrow memories.whitequark2020-04-241-3/+4
* cxxrtl: fix handling of parametric modules with large parameters.whitequark2020-04-241-1/+1
* cxxrtl: keep the memory write queue sorted on insertion.Asu2020-04-221-3/+5
* cxxrtl: run edge detectors only once in eval().whitequark2020-04-221-6/+22
* cxxrtl: add an unsupported knob for manipulating clock trees.whitequark2020-04-221-0/+18
* cxxrtl: use log_id() where appropriate. NFC.whitequark2020-04-211-4/+4
* cxxrtl: add (*cxxrtl.{comb,sync}*) annotations on black box outputs.whitequark2020-04-211-65/+186
* cxxrtl: s/sync_{wire,type}/edge_{wire,type}/. NFC.whitequark2020-04-211-23/+23
* cxxrtl: use one delta cycle for immediately converging netlists.whitequark2020-04-212-11/+21
* cxxrtl: add -O6, a shortcut for running `proc; flatten`.whitequark2020-04-211-4/+14
* cxxrtl: unbuffer module input wires.whitequark2020-04-211-31/+61
* cxxrtl: simplify generated edge detection logic.whitequark2020-04-211-56/+29
* cxxrtl: localize wires with multiple comb drivers, too.whitequark2020-04-211-32/+31
* cxxrtl: detect buffered comb wires, not just feedback wires.whitequark2020-04-211-5/+40
* cxxrtl: provide attributes to black box factories, too.whitequark2020-04-192-49/+57
* cxxrtl: add templated black box support.whitequark2020-04-181-16/+193
* cxxrtl: make eval() and commit() inline in blackboxes.whitequark2020-04-181-82/+103
* cxxrtl: add simple black box support.whitequark2020-04-182-70/+311
* cxxrtl: use ID::X instead of ID(X). NFC.whitequark2020-04-181-107/+107
* cxxrtl: correctly handle `sync always` rules.whitequark2020-04-171-3/+13
* cxxrtl: make ROMs writable, document memory::operator[].whitequark2020-04-162-4/+6
* cxxrtl: fix misleading example, caution about race conditions.whitequark2020-04-161-4/+13
* cxxrtl: remove inaccurate comment. NFC.whitequark2020-04-161-2/+0
* cxxrtl: Fix handling of unclocked memory read portsDavid Shah2020-04-141-2/+3
* Merge pull request #1922 from whitequark/write_cxxrtl-disconnected-outputswhitequark2020-04-141-0/+2
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| * write_cxxrtl: ignore disconnected module ports.whitequark2020-04-141-0/+2
* | write_cxxrtl: enable separate compilation.whitequark2020-04-141-9/+81
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* write_cxxrtl: add basic documentation.whitequark2020-04-091-1/+16
* write_cxxrtl: add support for $dlatch and $dlatchsr cells.whitequark2020-04-091-3/+16
* write_cxxrtl: add support for $sr cell.whitequark2020-04-091-27/+35
* write_cxxrtl: add support for $slice and $concat cells.whitequark2020-04-091-1/+16
* write_cxxrtl: improve writable memory handling.whitequark2020-04-092-65/+87
* write_cxxrtl: add support for hierarchical designs.whitequark2020-04-091-18/+107
* write_cxxrtl: avoid undefined behavior on out-of-bounds memory access.whitequark2020-04-092-46/+78
* write_cxxrtl: statically schedule comb logic and localize wires.whitequark2020-04-092-68/+368
* write_cxxrtl: elide wires for results of comb cells used once.whitequark2020-04-091-35/+359
* write_cxxrtl: new backend.whitequark2020-04-093-0/+2010