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| | * | | | Support explicit FIRRTL properties for better accommodation of FIRRTL/Verilog...Jim Lawson2019-07-312-94/+206
| | * | | | Merge remote-tracking branch 'upstream/master'Jim Lawson2019-07-3021-32/+164
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| | * \ \ \ \ Merge remote-tracking branch 'upstream/master'Jim Lawson2019-07-24199-1214/+9423
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| * | \ \ \ \ \ Merge pull request #1249 from mmicko/anlogic_fixClifford Wolf2019-08-071-16/+8
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| | * | | | | | | anlogic : Fix alu mappingMiodrag Milanovic2019-08-031-16/+8
| * | | | | | | | Merge pull request #1252 from YosysHQ/clifford/fix1231Clifford Wolf2019-08-071-15/+2
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| | * | | | | | | | Fix handling of functions/tasks without top-level begin-end block, fixes #1231Clifford Wolf2019-08-061-15/+2
| * | | | | | | | | Merge pull request #1253 from YosysHQ/clifford/checkClifford Wolf2019-08-073-9/+17
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| | * | | | | | | | | Be less aggressive with running design->check()Clifford Wolf2019-08-063-9/+17
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| * | | | | | | | | Merge pull request #1257 from YosysHQ/clifford/cellcostsClifford Wolf2019-08-073-109/+103
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| | * | | | | | | | Tweak default gate costs, cleanup "stat -tech cmos"Clifford Wolf2019-08-072-20/+10
| | * | | | | | | | Redesign of cell cost APIClifford Wolf2019-08-072-93/+97
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| * | | | | | | | Update CHANGELOGDavid Shah2019-08-071-0/+2
| * | | | | | | | Merge pull request #1241 from YosysHQ/clifford/jsonfixDavid Shah2019-08-072-36/+71
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| | * | | | | | | Update JSON front-end to process new attr/param encodingClifford Wolf2019-08-011-23/+34
| | * | | | | | | Implement improved JSON attr/param encodingClifford Wolf2019-08-011-13/+37
| * | | | | | | | Merge pull request #1232 from YosysHQ/dave/write_gzipDavid Shah2019-08-064-7/+79
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| | * | | | | | | Add test for writing gzip-compressed filesDavid Shah2019-08-062-0/+18
| | * | | | | | | Add support for writing gzip-compressed filesDavid Shah2019-08-062-7/+61
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| * | | | | | | Merge pull request #1251 from YosysHQ/clifford/nmuxClifford Wolf2019-08-0619-42/+174
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| | * | | | | | Add $_NMUX_, add "abc -g cmos", add proper cmos cell costsClifford Wolf2019-08-0619-42/+174
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| * | | | | | Merge pull request #1242 from jfng/fix-proc_prune-partialwhitequark2019-08-031-2/+11
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| | * | | | | | proc_prune: Promote partially redundant assignments.Jean-François Nguyen2019-08-011-2/+11
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* | | | | | | clock for ram trough gbufMiodrag Milanovic2019-08-041-0/+6
* | | | | | | Added bram supportMiodrag Milanovic2019-08-046-1/+260
* | | | | | | Custom step to add global clock buffersMiodrag Milanovic2019-08-034-1/+129
* | | | | | | Initial EFINIX supportMiodrag Milanovic2019-08-035-0/+370
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* | | | | | Merge pull request #1238 from mmicko/vsbuild_fixClifford Wolf2019-08-022-1/+2
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| * | | | | | Visual Studio build fixMiodrag Milanovic2019-07-312-1/+2
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* | | | | | Merge pull request #1239 from mmicko/mingw_fixClifford Wolf2019-08-0211-25/+37
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| * | | | | | Fix linking issue for new mxe and pthreadMiodrag Milanovic2019-08-011-1/+2
| * | | | | | Fix yosys linking for mxeMiodrag Milanovic2019-08-011-1/+1
| * | | | | | New mxe hacks needed to support 2ca237eMiodrag Milanovic2019-08-011-0/+4
| * | | | | | Fix formatting for msys2 mingw build using GetSizeMiodrag Milanovic2019-08-0110-23/+30
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* | | | | | Merge pull request #1236 from YosysHQ/eddie/xc6s_brams_mapEddie Hung2019-08-011-3/+3
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| * | | | | RST -> RSTBRST for RAMB8BWEREddie Hung2019-07-291-3/+3
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* | | | | Merge pull request #1233 from YosysHQ/clifford/deferClifford Wolf2019-07-312-49/+21
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| * | | | Update README to use "read" instead of "read_verilog"Clifford Wolf2019-07-291-48/+19
| * | | | Call "read_verilog" with -defer from "read"Clifford Wolf2019-07-291-1/+2
* | | | | Merge pull request #1228 from YosysHQ/dave/yy_buf_sizeEddie Hung2019-07-291-0/+3
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| * | | | | verilog_lexer: Increase YY_BUF_SIZE to 65536David Shah2019-07-261-0/+3
* | | | | | Merge pull request #1234 from mmicko/fix_gzip_no_existDavid Shah2019-07-291-19/+21
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| * | | | | Fix case when file does not existMiodrag Milanovic2019-07-291-19/+21
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* | | | | Merge pull request #1226 from YosysHQ/dave/gzipDavid Shah2019-07-278-13/+70
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| * | | | Update CHANGELOGDavid Shah2019-07-261-1/+1
| * | | | Fix frontend auto-detection for gzipped inputDavid Shah2019-07-261-9/+12
| * | | | Add support for reading gzip'd input filesDavid Shah2019-07-266-3/+57
* | | | | Merge branch 'master' of github.com:YosysHQ/yosysEddie Hung2019-07-2517-29/+360
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| * \ \ \ \ Merge branch 'ZirconiumX-synth_intel_m9k'Clifford Wolf2019-07-254-5/+11
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| | * | | | | intel: Map M9K BRAM only on families that have itDan Ravensloft2019-07-234-5/+12
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