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* | | | Add ENABLE_GCOV build optionClifford Wolf2018-08-271-0/+11
| | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | Merge pull request #617 from mmicko/masterClifford Wolf2018-08-251-1/+1
|\ \ \ \ | | | | | | | | | | static link flag on main executable
| * | | | static link flag on main executableMiodrag Milanovic2018-08-251-1/+1
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* | | | Merge pull request #610 from udif/udif_specify_round2Clifford Wolf2018-08-231-16/+39
|\ \ \ \ | | | | | | | | | | More specify/endspecify fixes
| * | | | Fixed all known specify/endspecify issues, without breaking 'make test'.Udi Finkelstein2018-08-201-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | Some the of parser fixes may look strange but they were needed to avoid shift/reduce conflicts, due to the explicit parentheses in path_delay_value, and the mintypmax values without parentheses
| * | | | Yosys can now parse ↵Udi Finkelstein2018-08-201-10/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://github.com/verilog-to-routing/vtr-verilog-to-routing/blob/master/vtr_flow/primitives.v , (specify block ignored). Must use 'read_verilog -defer' due to a parameter not assigned a default value.
| * | | | A few minor enhancements to specify block parsing.Udi Finkelstein2018-08-151-2/+13
| | | | | | | | | | | | | | | | | | | | Just remember specify blocks are parsed but ignored.
* | | | | Merge pull request #614 from udif/pr_disable_dump_ptrClifford Wolf2018-08-233-9/+20
|\ \ \ \ \ | | | | | | | | | | | | Added -no_dump_ptr flag for AST dump options in 'read_verilog'
| * | | | | Added -no_dump_ptr flag for AST dump options in 'read_verilog'Udi Finkelstein2018-08-233-9/+20
|/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | This option disables the memory pointer display. This is useful when diff'ing different dumps because otherwise the node pointers makes every diff line different when the AST content is the same.
| | * | | Remove unused functions.Jim Lawson2018-08-271-10/+0
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| | * | | Add support for module instances.Jim Lawson2018-08-231-17/+122
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | Don't pad logical operands to one bit. Use operand width and signedness in $reduce_bool. Shift amounts are unsigned and shouldn't be padded. Group "is invalid" with the wire declaration, not its use (otherwise it is incorrectly wired to 0).
| | * | Merge pull request #1 from YosysHQ/masterJim Lawson2018-08-22196-770/+2533
| | |\ \ | |_|/ / |/| | | merge with YosysHQ master
* | | | Add "verific -work" help messageClifford Wolf2018-08-221-0/+7
| | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | Add Verific -work parameterClifford Wolf2018-08-221-8/+18
| | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | Merge pull request #606 from cr1901/show-winClifford Wolf2018-08-191-3/+20
|\ \ \ \ | | | | | | | | | | `show` pass `-format` and `-viewer` improvements on Windows
| * | | | Update show pass documentation with Windows caveats.William D. Jones2018-08-151-1/+2
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| * | | | Fix run_command() when using -format and -viewer in show pass.William D. Jones2018-08-151-2/+18
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* | | | Merge pull request #608 from mmicko/masterClifford Wolf2018-08-181-1/+19
|\ \ \ \ | | | | | | | | | | Static builds and cross-compilation support
| * | | | no -fPIC for any static buildMiodrag Milanovic2018-08-181-3/+1
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| * | | | respect DISABLE_ABC_THREADS if usedMiodrag Milanovic2018-08-181-2/+5
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| * | | | Enable propagating ARCHFLAGSMiodrag Milanovic2018-08-181-2/+2
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| * | | | Added option to disable -fPIC on unsupported platformsMiodrag Milanovic2018-08-181-0/+3
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| * | | | Added gcc-static for easier cross compilationMiodrag Milanovic2018-08-181-1/+15
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* | | | Merge pull request #575 from aman-goel/masterClifford Wolf2018-08-181-27/+136
|\ \ \ \ | | |_|/ | |/| | Adds -expose option to setundef pass
| * | | Revision to expose option in setundef passAman Goel2018-08-181-154/+123
| | | | | | | | | | | | | | | | | | | | | | | | Corrects indentation Simplifications and corrections
| * | | Merge pull request #3 from YosysHQ/masterAman Goel2018-08-18187-728/+1097
| |\ \ \ | |/ / / |/| | | Updates from official repo
* | | | Add "verific -set-<severity> <msg_id>.."Clifford Wolf2018-08-161-14/+52
| | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | Verific workaround for VIPER ticket 13851Clifford Wolf2018-08-161-0/+3
| |/ / |/| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | Merge pull request #605 from mmicko/masterClifford Wolf2018-08-151-4/+4
|\ \ \ | | | | | | | | Changes for MXE configuration in order to compile
| * | | Changes for MXE configuration in order to compileMiodrag Milanovic2018-08-151-4/+4
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* | | Merge pull request #573 from cr1901/msys-64Clifford Wolf2018-08-151-2/+17
|\ \ \ | | | | | | | | Add support for 64-bit builds using msys2 environment, use msys-provided `libpthread`.
| * | | Add support for 64-bit builds using msys2 environment.William D. Jones2018-06-271-1/+16
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| * | | Use msys2-provided pthreads instead of abc's.William D. Jones2018-06-271-1/+1
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* | | | Merge pull request #591 from hzeller/virtual-overrideClifford Wolf2018-08-15170-416/+414
|\ \ \ \ | | | | | | | | | | Consistent use of 'override' for virtual methods in derived classes.
| * | | | Consistent use of 'override' for virtual methods in derived classes.Henner Zeller2018-07-20170-416/+414
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established)
* | | | | Merge pull request #590 from hzeller/remaining-file-errorClifford Wolf2018-08-151-15/+15
|\ \ \ \ \ | | | | | | | | | | | | Fix remaining log_file_error(); emit dependent file references in new…
| * | | | | Fix remaining log_file_error(); emit dependent file references in new line.Henner Zeller2018-07-201-15/+15
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are some places that reference dependent file locations ("this function was called from ..."). These are now in a separate line for ease of jumping to it with the editor (behaves similarly to compilers that emit dependent messages).
* | | | | Merge pull request #576 from cr1901/no-resourceClifford Wolf2018-08-151-9/+12
|\ \ \ \ \ | | | | | | | | | | | | Gate POSIX-only signals and resource module to only run on POSIX Pyth…
| * | | | | Gate POSIX-only signals and resource module to only run on POSIX Python ↵William D. Jones2018-07-061-9/+12
| | |_|_|/ | |/| | | | | | | | | | | | | implementations.
* | | | | Merge pull request #592 from japm48/masterClifford Wolf2018-08-152-0/+4
|\ \ \ \ \ | | | | | | | | | | | | fix basys3 example
| * | | | | fix basys3 examplejapm482018-07-222-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added `CONFIG_VOLTAGE` and `CFGBVS` to constraints file to avoid warning `DRC 23-20`. Added `open_hw` needed for programming.
* | | | | | Merge pull request #513 from udif/pr_reg_wire_errorClifford Wolf2018-08-157-4/+132
|\ \ \ \ \ \ | | | | | | | | | | | | | | Add error checking for reg/wire/logic misuse - PR now passes 'make test' (plus a new test)
| * | | | | | Modified errors into warningsUdi Finkelstein2018-06-055-11/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | No longer false warnings for memories and assertions
| * | | | | | reg_wire_error test needs the -sv flag so it is run via a script so it had ↵Udi Finkelstein2018-06-052-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | to be moved out of the tests/simple dir that only runs Verilog files
| * | | | | | This PR should be the base for discussion, do not merge it yet!Udi Finkelstein2018-03-116-4/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It correctly detects reg/wire mix and incorrect use on blocking,nonblocking assignments within blocks and assign statements. What it DOES'T do: Detect registers connected to output ports of instances. Where it FAILS: memorty nonblocking assignments causes spurious (I assume??) errors on yosys-generated "_ADDR", "_DATA", "EN" signals. You can test it with tests/simple/reg_wire_error.v (look inside for the comments to enable/disable specific lines)
* | | | | | | Merge pull request #562 from udif/pr_fix_illegal_port_declClifford Wolf2018-08-151-3/+6
|\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | Detect illegal port declaration, e.g input/output/inout keyword must …
| * | | | | | | Detect illegal port declaration, e.g input/output/inout keyword must be the ↵Udi Finkelstein2018-06-061-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | first.
* | | | | | | | Fix use of signed integers in JSON back-endClifford Wolf2018-08-141-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | Merge pull request #602 from litghost/add_eblif_extensionClifford Wolf2018-08-141-0/+2
|\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | Map .eblif extension as blif.
| * | | | | | | | Map .eblif extension as blif.litghost2018-08-131-0/+2
| | |_|/ / / / / | |/| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: litghost <537074+litghost@users.noreply.github.com>
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