| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Update issue_template.md | Claire Xen | 2021-02-27 | 1 | -1/+1 |
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| * | Add tests for $countbits | Michael Singer | 2021-02-26 | 2 | -0/+76 |
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| * | Implement $countones, $isunknown and $onehot{,0} | Michael Singer | 2021-02-26 | 1 | -0/+28 |
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| * | Implement $countbits function | Michael Singer | 2021-02-26 | 1 | -0/+59 |
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| * | Extend simplify() recursion warning | Zachary Snow | 2021-02-26 | 1 | -1/+1 |
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| * | Bump version | Marcelina Kościelnicka | 2021-02-26 | 1 | -1/+1 |
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| * | Merge pull request #2554 from hzeller/master | whitequark | 2021-02-25 | 1 | -6/+17 |
| |\ | | | | | Fix digit-formatting calculation for small numbers. | ||||
| | * | Provide an integer implementation of decimal_digits(). | Henner Zeller | 2021-02-01 | 1 | -2/+9 |
| | | | | | | | | | Signed-off-by: Henner Zeller <h.zeller@acm.org> | ||||
| | * | Fix digit-formatting calculation for small numbers. | Henner Zeller | 2021-01-21 | 1 | -6/+10 |
| | | | | | | | | | | | | | | | | | | | | | | | | | Calling log10() on zero causes a non-sensical value to be calculated. On some compile options, I've observed yosys crashing with an illegal instruction (SIGILL). To make it safe, fix the calculation to do a range check; wrap it a decimal_digits() function, and use it where the previous ceil(log10(n)) call was used. As a side, it also improves readability. Signed-off-by: Henner Zeller <h.zeller@acm.org> | ||||
| * | | btor, smt2, smv: Add a hint on how to deal with funny FF types. | Marcelina Kościelnicka | 2021-02-25 | 3 | -3/+42 |
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| * | | Fix handling of unique/unique0/priority cases in the frontend. | Marcelina Kościelnicka | 2021-02-25 | 2 | -15/+16 |
| | | | | | | | | | | | | | | | | | | | | | Basically: - priority converts to (* full_case *) - unique0 converts to (* parallel_case *) - unique converts to (* parallel_case, full_case *) Fixes #2596. | ||||
| * | | Extend "delay" expressions to handle pair and triplet, i.e. rise, fall and ↵ | TimRudy | 2021-02-24 | 3 | -2/+445 |
| | | | | | | | | | turn-off (#2566) | ||||
| * | | Merge pull request #2607 from zachjs/logger-error-atexit | whitequark | 2021-02-24 | 1 | -3/+3 |
| |\ \ | | | | | | | Fix double-free on unmatched logger error pattern | ||||
| | * | | Fix double-free on unmatched logger error pattern | Zachary Snow | 2021-02-23 | 1 | -3/+3 |
| |/ / | | | | | | | | | | | | | When an expected logger error pattern is unmatched, the logger raises another (hidden) error. Because of the previous ordering of actions, `logv_error_with_prefix()` would inadvertently invoke `yosys_atexit()` twice, causing a double-free. | ||||
| * | | Add tests for some common techmap files. | Marcelina Kościelnicka | 2021-02-24 | 3 | -0/+50 |
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| * | | Fix syntax error in adff2dff.v | Marcelina Kościelnicka | 2021-02-24 | 1 | -1/+1 |
| | | | | | | | | | Fixes #2600. | ||||
| * | | frontend: Make helper functions for printing locations. | Marcelina Kościelnicka | 2021-02-23 | 4 | -57/+71 |
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| * | | Merge pull request #2594 from zachjs/func-arg-width | whitequark | 2021-02-23 | 10 | -47/+124 |
| |\ \ | | | | | | | verilog: fix sizing of constant args for tasks/functions | ||||
| | * | | verilog: fix sizing of constant args for tasks/functions | Zachary Snow | 2021-02-21 | 10 | -47/+124 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Simplify synthetic localparams for normal calls to update their width - This step was inadvertently removed alongside `added_mod_children` - Support redeclaration of constant function arguments - `eval_const_function` never correctly handled this, but the issue was not exposed in the existing tests until the recent change to always attempt constant function evaluation when all-const args are used - Check asserts in const_arg_loop and const_func tests - Add coverage for width mismatch error cases | ||||
| * | | | int -> bool | Robert Baruch | 2021-02-23 | 1 | -2/+2 |
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| * | | | Adds is_wire to SigBit and SigChunk | Robert Baruch | 2021-02-23 | 1 | -0/+3 |
| | | | | | | | | | | Useful for PYOSYS because Python can't easily check wire against NULL. | ||||
| * | | | machxo2: Switch to LUT4 sim model which propagates less undefined/don't care ↵ | William D. Jones | 2021-02-23 | 2 | -12/+6 |
| | | | | | | | | | | | | | values. | ||||
| * | | | machxo2: Update tribuf test to reflect active-low OE. | William D. Jones | 2021-02-23 | 1 | -1/+2 |
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| * | | | machxo2: Add experimental status to help. | William D. Jones | 2021-02-23 | 1 | -1/+1 |
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| * | | | machxo2: Add DCCA and DCMA blackbox primitives. | William D. Jones | 2021-02-23 | 1 | -0/+17 |
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| * | | | machxo2: Fix reversed interpretation of REG_SD config bits. | William D. Jones | 2021-02-23 | 1 | -2/+2 |
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| * | | | machxo2: Tristate is active-low. | William D. Jones | 2021-02-23 | 2 | -5/+5 |
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| * | | | machxo2: Fix typos in FACADE_FF sim model. | William D. Jones | 2021-02-23 | 1 | -5/+4 |
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| * | | | machxo2: Fix naming of TRELLIS_IO ports to match PIO pins in routing graph. | William D. Jones | 2021-02-23 | 2 | -6/+6 |
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| * | | | machxo2: Improve help_mode output in synth_machxo2. | William D. Jones | 2021-02-23 | 1 | -5/+5 |
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| * | | | machxo2: Use attrmvcp pass to move LOC and src attributes from ports/wires ↵ | William D. Jones | 2021-02-23 | 2 | -1/+17 |
| | | | | | | | | | | | | | to IO cells. | ||||
| * | | | machxo2: Add missing OSCH oscillator primitive. | William D. Jones | 2021-02-23 | 1 | -0/+10 |
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| * | | | machxo2: Add believed-to-be-correct tribuf test. | William D. Jones | 2021-02-23 | 1 | -0/+9 |
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| * | | | machxo2: Add passing fsm, mux, and shifter tests. | William D. Jones | 2021-02-23 | 3 | -0/+65 |
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| * | | | machxo2: Add add_sub test. Fix tests to include FACADE_IO primitives. | William D. Jones | 2021-02-23 | 3 | -3/+11 |
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| * | | | machxo2: Add -noiopad option to synth_machxo2. | William D. Jones | 2021-02-23 | 1 | -2/+11 |
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| * | | | machxo2: Use correct INITVAL for LUT1 in FACADE_SLICE. | William D. Jones | 2021-02-23 | 1 | -1/+1 |
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| * | | | machxo2: Fix cells_sim typo where OFX1 was multiply-driven. | William D. Jones | 2021-02-23 | 1 | -1/+1 |
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| * | | | machxo2: synth_machxo2 now maps ports to FACADE_IO. | William D. Jones | 2021-02-23 | 2 | -0/+12 |
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| * | | | machxo2: Add initial value for Q in FACADE_FF. | William D. Jones | 2021-02-23 | 1 | -0/+2 |
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| * | | | machxo2: Add FACADE_IO simulation model. More comments on models. | William D. Jones | 2021-02-23 | 1 | -0/+25 |
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| * | | | machxo2: Add FACADE_SLICE simulation model. | William D. Jones | 2021-02-23 | 1 | -0/+83 |
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| * | | | machxo2: Improve FACADE_FF simulation model. | William D. Jones | 2021-02-23 | 1 | -12/+20 |
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| * | | | machxo2: Improve LUT4 techmap. Use same output port name for LUT4 as Lattice. | William D. Jones | 2021-02-23 | 2 | -4/+4 |
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| * | | | machxo2: Add dffe test. | William D. Jones | 2021-02-23 | 1 | -0/+9 |
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| * | | | machxo2: Add dff.ys test, fix another cells_map.v typo. | William D. Jones | 2021-02-23 | 2 | -1/+11 |
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| * | | | machxo2: Fix more oversights in machxo2 models. logic.ys test passes. | William D. Jones | 2021-02-23 | 2 | -2/+6 |
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| * | | | machxo2: Add test/arch/machxo2 directory (test does not pass). | William D. Jones | 2021-02-23 | 4 | -0/+15 |
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| * | | | machxo2: Fix typos. test/arch/run-test.sh passes. | William D. Jones | 2021-02-23 | 2 | -2/+2 |
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| * | | | machxo2: Create basic techlibs and synth_machxo2 pass. | William D. Jones | 2021-02-23 | 4 | -0/+320 |
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index : iCE40/yosys | |
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