| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Fix typo in B | Eddie Hung | 2019-07-19 | 1 | -1/+1 |
| * | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-07-18 | 29 | -228/+405 |
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| | * | Merge pull request #1208 from ZirconiumX/intel_cleanups | David Shah | 2019-07-18 | 1 | -29/+14 |
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| | | * | synth_intel: Use stringf | Dan Ravensloft | 2019-07-18 | 1 | -7/+2 |
| | | * | synth_intel: s/not family/no family/ | Dan Ravensloft | 2019-07-18 | 1 | -2/+2 |
| | | * | synth_intel: revert change to run_max10 | Dan Ravensloft | 2019-07-18 | 1 | -1/+1 |
| | | * | intel_synth: Fix help message | Ben Widawsky | 2019-07-18 | 1 | -1/+1 |
| | | * | intel_synth: Small code cleanup to remove if ladder | Ben Widawsky | 2019-07-18 | 2 | -29/+11 |
| | | * | intel_synth: Make family explicit and match | Ben Widawsky | 2019-07-18 | 1 | -2/+6 |
| | | * | intel_synth: Minor code cleanups | Ben Widawsky | 2019-07-18 | 1 | -2/+6 |
| | * | | Merge pull request #1207 from ZirconiumX/intel_new_pass_names | David Shah | 2019-07-18 | 1 | -4/+4 |
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| | | * | synth_intel: rename for consistency with #1184 | Dan Ravensloft | 2019-07-18 | 1 | -4/+4 |
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| | * | Merge pull request #1184 from whitequark/synth-better-labels | Clifford Wolf | 2019-07-18 | 5 | -17/+21 |
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| | | * | synth_ecp5: rename dram to lutram everywhere. | whitequark | 2019-07-16 | 4 | -13/+13 |
| | | * | synth_{ice40,ecp5}: more sensible pass label naming. | whitequark | 2019-07-16 | 2 | -5/+9 |
| | * | | Merge pull request #1203 from whitequark/write_verilog-zero-width-values | Clifford Wolf | 2019-07-18 | 1 | -1/+2 |
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| | | * | | write_verilog: dump zero width constants correctly. | whitequark | 2019-07-16 | 1 | -1/+2 |
| | * | | | Remove old $pmux_safe code from write_verilog | Clifford Wolf | 2019-07-17 | 1 | -5/+4 |
| | * | | | Merge pull request #1204 from smunaut/fix_1187 | David Shah | 2019-07-17 | 2 | -4/+4 |
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| | | * | | ice40: Adapt the relut process passes to the new $lut <=> SB_LUT4 port map | Sylvain Munaut | 2019-07-16 | 2 | -4/+4 |
| | * | | | Merge pull request #1202 from YosysHQ/cmp2lut_lut6 | Eddie Hung | 2019-07-16 | 4 | -24/+37 |
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| | | * | | gen_lut to return correctly sized LUT mask | Eddie Hung | 2019-07-16 | 1 | -1/+1 |
| | | * | | Forgot to commit | Eddie Hung | 2019-07-16 | 1 | -0/+7 |
| | | * | | Add tests for cmp2lut on LUT6 | Eddie Hung | 2019-07-16 | 2 | -23/+29 |
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| | * | | Merge pull request #1188 from YosysHQ/eddie/abc9_push_inverters | Eddie Hung | 2019-07-16 | 2 | -45/+128 |
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| | | * | | Add comment | Eddie Hung | 2019-07-13 | 1 | -0/+5 |
| | | * | | Update test with more accurate LUT mask | Eddie Hung | 2019-07-12 | 1 | -1/+1 |
| | | * | | duplicate -> clone | Eddie Hung | 2019-07-12 | 1 | -3/+3 |
| | | * | | More cleanup | Eddie Hung | 2019-07-12 | 1 | -8/+2 |
| | | * | | Cleanup | Eddie Hung | 2019-07-12 | 1 | -29/+51 |
| | | * | | Cleanup | Eddie Hung | 2019-07-12 | 1 | -10/+4 |
| | | * | | Cleanup | Eddie Hung | 2019-07-12 | 1 | -15/+24 |
| | | * | | More cleanup | Eddie Hung | 2019-07-12 | 1 | -11/+10 |
| | | * | | Cleanup | Eddie Hung | 2019-07-12 | 1 | -46/+16 |
| | | * | | Cleanup | Eddie Hung | 2019-07-12 | 1 | -7/+1 |
| | | * | | Cleanup | Eddie Hung | 2019-07-12 | 1 | -13/+109 |
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| | * | | Merge pull request #1186 from YosysHQ/eddie/abc9_ice40_fix | Eddie Hung | 2019-07-16 | 9 | -31/+122 |
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| | | * | | $__ICE40_CARRY_LUT4 -> $__ICE40_FULL_ADDER as per @whitequark | Eddie Hung | 2019-07-15 | 7 | -8/+8 |
| | | * | | ice40_opt to $__ICE40_CARRY_LUT4 into $lut not SB_LUT | Eddie Hung | 2019-07-13 | 1 | -9/+7 |
| | | * | | Do not double count cells in abc | Eddie Hung | 2019-07-12 | 1 | -2/+2 |
| | | * | | Use Const::from_string() not its constructor... | Eddie Hung | 2019-07-12 | 1 | -1/+1 |
| | | * | | Off by one | Eddie Hung | 2019-07-12 | 1 | -1/+1 |
| | | * | | Fix spacing | Eddie Hung | 2019-07-12 | 1 | -1/+1 |
| | | * | | Remove double push | Eddie Hung | 2019-07-12 | 1 | -1/+0 |
| | | * | | Map to and from this box if -abc9 | Eddie Hung | 2019-07-12 | 1 | -2/+3 |
| | | * | | ice40_opt to handle this box and opt back to SB_LUT4 | Eddie Hung | 2019-07-12 | 1 | -0/+48 |
| | | * | | Add new box to cells_sim.v | Eddie Hung | 2019-07-12 | 1 | -2/+25 |
| | | * | | _ABC macro will map and unmap to this new box | Eddie Hung | 2019-07-12 | 2 | -0/+34 |
| | | * | | Combine SB_CARRY+SB_LUT into one $__ICE40_CARRY_LUT4 box | Eddie Hung | 2019-07-12 | 3 | -25/+13 |
| | * | | | Merge pull request #1200 from mmicko/fix_typo_liberty_cc | Clifford Wolf | 2019-07-16 | 1 | -1/+1 |
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index : iCE40/yosys | |
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