| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Merge remote-tracking branch 'origin/master' into xc7mux | Eddie Hung | 2019-07-09 | 16 | -79/+348 |
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| | * | Merge pull request #1168 from whitequark/bugpoint-processes | Clifford Wolf | 2019-07-09 | 2 | -17/+105 |
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| | | * | bugpoint: add -assigns and -updates options. | whitequark | 2019-07-09 | 1 | -9/+81 |
| | | * | proc_clean: add -quiet option. | whitequark | 2019-07-09 | 1 | -8/+24 |
| | * | | Merge pull request #1169 from whitequark/more-proc-cleanups | Clifford Wolf | 2019-07-09 | 5 | -22/+168 |
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| | | * | | proc_prune: promote assigns to module connections when legal. | whitequark | 2019-07-09 | 3 | -33/+42 |
| | | * | | proc_prune: new pass. | whitequark | 2019-07-09 | 3 | -1/+138 |
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| | * | | Merge pull request #1163 from whitequark/more-case-attrs | Clifford Wolf | 2019-07-09 | 3 | -16/+28 |
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| | | * | | verilog_backend: dump attributes on SwitchRule. | whitequark | 2019-07-08 | 1 | -0/+1 |
| | | * | | proc_mux: consider \src attribute on CaseRule. | whitequark | 2019-07-08 | 1 | -10/+16 |
| | | * | | verilog_backend: dump attributes on CaseRule, as comments. | whitequark | 2019-07-08 | 1 | -6/+10 |
| | | * | | genrtlil: emit \src attribute on CaseRule. | whitequark | 2019-07-08 | 1 | -0/+1 |
| | * | | | Merge pull request #1162 from whitequark/rtlil-case-attrs | Clifford Wolf | 2019-07-09 | 3 | -5/+15 |
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| | | * | | Allow attributes on individual switch cases in RTLIL. | whitequark | 2019-07-08 | 3 | -5/+15 |
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| | * | | Merge pull request #1167 from YosysHQ/eddie/xc7srl_cleanup | Clifford Wolf | 2019-07-09 | 1 | -19/+25 |
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| | | * \ | Merge branch 'eddie/script_from_wire' into eddie/xc7srl_cleanup | Eddie Hung | 2019-07-02 | 6 | -15/+20 |
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| | | * | | | Cleanup SRL inference/make more consistent | Eddie Hung | 2019-06-29 | 1 | -19/+25 |
| | * | | | | Merge pull request #1166 from YosysHQ/eddie/synth_keepdc | Eddie Hung | 2019-07-08 | 3 | -3/+15 |
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| | * \ \ \ \ | Merge branch 'master' of github.com:YosysHQ/yosys | Eddie Hung | 2019-07-08 | 2 | -8/+22 |
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| | | * \ \ \ \ | Merge pull request #1164 from YosysHQ/eddie/muxcover_mux2 | Eddie Hung | 2019-07-08 | 1 | -8/+19 |
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| | | * \ \ \ \ \ | Merge pull request #1160 from ZirconiumX/cyclone_v | David Shah | 2019-07-08 | 1 | -0/+3 |
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| | | | * | | | | | synth_intel: Warn about untested Quartus backend | Dan Ravensloft | 2019-07-07 | 1 | -0/+3 |
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| | * / / / / / | Clarify script -scriptwire doc | Eddie Hung | 2019-07-08 | 1 | -0/+4 |
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| * | | | | | | synth_xilinx to call commands of synth -coarse directly | Eddie Hung | 2019-07-09 | 1 | -3/+20 |
| * | | | | | | Revert "synth_xilinx to call "synth -run coarse" with "-keepdc"" | Eddie Hung | 2019-07-09 | 1 | -2/+2 |
| * | | | | | | Fix spacing | Eddie Hung | 2019-07-09 | 1 | -1/+1 |
| * | | | | | | Fix spacing | Eddie Hung | 2019-07-09 | 1 | -1/+1 |
| * | | | | | | Decompose mux inputs in delay-orientated (rather than area) fashion | Eddie Hung | 2019-07-08 | 1 | -18/+30 |
| * | | | | | | Do not call opt -mux_undef (part of -full) before muxcover | Eddie Hung | 2019-07-08 | 1 | -1/+5 |
| * | | | | | | Add one more comment | Eddie Hung | 2019-07-08 | 1 | -0/+3 |
| * | | | | | | Less thinking | Eddie Hung | 2019-07-08 | 1 | -3/+3 |
| * | | | | | | Reword | Eddie Hung | 2019-07-08 | 1 | -2/+2 |
| * | | | | | | synth_xilinx to call "synth -run coarse" with "-keepdc" | Eddie Hung | 2019-07-08 | 1 | -2/+2 |
| * | | | | | | Merge remote-tracking branch 'origin/eddie/synth_keepdc' into xc7mux | Eddie Hung | 2019-07-08 | 4 | -8/+25 |
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| | * | | | | | Add synth -keepdc to CHANGELOG | Eddie Hung | 2019-07-08 | 1 | -0/+1 |
| | * | | | | | Clarify 'wreduce -keepdc' doc | Eddie Hung | 2019-07-08 | 1 | -1/+1 |
| | * | | | | | Add synth -keepdc option | Eddie Hung | 2019-07-08 | 1 | -2/+13 |
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| | * | | | | Update muxcover doc as per @ZirconiumX | Eddie Hung | 2019-07-08 | 1 | -5/+10 |
| * | | | | | Map $__XILINX_SHIFTX in a more balanced manner | Eddie Hung | 2019-07-08 | 1 | -36/+49 |
| * | | | | | Capitalisation | Eddie Hung | 2019-07-08 | 1 | -1/+1 |
| * | | | | | Add synth_xilinx -widemux recommended value | Eddie Hung | 2019-07-08 | 1 | -1/+1 |
| * | | | | | Fixes for 2:1 muxes | Eddie Hung | 2019-07-08 | 2 | -5/+30 |
| * | | | | | synth_xilinx -widemux=2 is minimum now | Eddie Hung | 2019-07-08 | 1 | -4/+7 |
| * | | | | | Parametric muxcover costs as per @daveshah1 | Eddie Hung | 2019-07-08 | 1 | -16/+14 |
| * | | | | | Merge remote-tracking branch 'origin/eddie/muxcover_mux2' into xc7mux | Eddie Hung | 2019-07-08 | 1 | -5/+11 |
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| | * | | | | atoi -> stoi | Eddie Hung | 2019-07-08 | 1 | -5/+5 |
| | * | | | | Add muxcover -mux2=cost option | Eddie Hung | 2019-07-08 | 1 | -1/+7 |
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| * | | | | atoi -> stoi as per @daveshah1 | Eddie Hung | 2019-07-08 | 1 | -1/+1 |
| * | | | | Merge remote-tracking branch 'origin/master' into xc7mux | Eddie Hung | 2019-07-08 | 8 | -90/+60 |
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| | * | | | Merge pull request #1159 from btut/fix/1090_segfault_cell_and_wire | Clifford Wolf | 2019-07-05 | 1 | -0/+3 |
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index : iCE40/yosys | |
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