| Commit message (Expand) | Author | Age | Files | Lines | ||
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| | * | | | | | | tee: Allow logging command output to a given scratchpad value | Jannis Harder | 2022-12-02 | 3 | -0/+20 | |
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| * | | | | | | Merge pull request #3568 from YosysHQ/verific_msg | Miodrag Milanović | 2022-12-05 | 1 | -3/+16 | |
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| | * | | | | | | set VERI-1063 explicitly | Miodrag Milanovic | 2022-12-02 | 1 | -5/+7 | |
| | * | | | | | | Set all verific messages of certain type to other | Miodrag Milanovic | 2022-11-30 | 1 | -3/+14 | |
| * | | | | | | | Merge pull request #3569 from YosysHQ/ver_no_rewriters | Miodrag Milanović | 2022-12-05 | 1 | -0/+2 | |
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| | * | | | | | | reset elaboration error after rewriter | Miodrag Milanovic | 2022-11-30 | 1 | -0/+2 | |
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| | | | * | | | Merge branch 'claire/eqystuff' of github.com:YosysHQ/yosys into claire/eqystuff | Claire Xenia Wolf | 2022-12-21 | 1 | -14/+10 | |
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| | | | | * | | | xprop: Improve signal splitting code | Jannis Harder | 2022-12-12 | 1 | -14/+10 | |
| | | | * | | | | Allow non-unique modules without state in sim writeback-mode | Claire Xenia Wolf | 2022-12-21 | 1 | -4/+5 | |
| | | | * | | | | Small bugfix in uniquify pass | Claire Xenia Wolf | 2022-12-21 | 1 | -0/+1 | |
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| | | | * | | | Improvements in "viz" pass | Claire Xenia Wolf | 2022-12-09 | 1 | -24/+100 | |
| | | | * | | | Add gold-x handing to miter cross port handling | Claire Xenia Wolf | 2022-12-08 | 1 | -1/+9 | |
| | | | * | | | Merge branch 'claire/eqystuff' of github.com:YosysHQ/yosys into claire/eqystuff | Claire Xenia Wolf | 2022-12-08 | 1 | -0/+39 | |
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| | | | | * \ \ | Merge pull request #3579 from jix/split_public_untested | Claire Xen | 2022-12-08 | 1 | -0/+39 | |
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| | | | | | * | | | xprop: Add -split-public option | Jannis Harder | 2022-12-08 | 1 | -0/+39 | |
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| | | | * / / / | Improvements in "viz" command | Claire Xenia Wolf | 2022-12-07 | 1 | -17/+51 | |
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| | | | * | | | Improvements in "viz" pass | Claire Xenia Wolf | 2022-12-07 | 1 | -313/+453 | |
| | | | * | | | Various improvements in "viz" command | Claire Xenia Wolf | 2022-12-06 | 1 | -72/+242 | |
| | | | * | | | Bugfix in splitcells pass | Claire Xenia Wolf | 2022-12-06 | 1 | -5/+13 | |
| | | | * | | | Improvements in "viz" command | Claire Xenia Wolf | 2022-12-04 | 1 | -45/+196 | |
| | | | * | | | Add "viz" pass for visualizing big-picture data flow in larger designs | Claire Xenia Wolf | 2022-12-04 | 2 | -0/+511 | |
| | | | * | | | Add splitcells pass | Claire Xenia Wolf | 2022-12-04 | 2 | -0/+192 | |
| | | | * | | | Merge branch 'master' of github.com:YosysHQ/yosys into claire/eqystuff | Claire Xenia Wolf | 2022-12-04 | 2 | -1/+8 | |
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| * | | | | | | Merge pull request #3567 from YosysHQ/tcl_fix_crash | Miodrag Milanović | 2022-12-02 | 2 | -1/+8 | |
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| | * | | | | | | Fix tcl crash in case of error executing command | Miodrag Milanovic | 2022-11-30 | 2 | -1/+8 | |
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| | | | * | | | Merge branch 'xprop' of github.com:jix/yosys into claire/eqystuff | Claire Xenia Wolf | 2022-12-01 | 29 | -79/+2537 | |
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| | | * | | | | miter: Add -make_cover option to cover each output pair difference | Jannis Harder | 2022-11-30 | 1 | -0/+14 | |
| | | * | | | | formalff: Fix -ff2anyinit assertion error for fine FFs | Jannis Harder | 2022-11-30 | 1 | -0/+2 | |
| | | * | | | | New xprop pass to encode 3-valued x-propagation using 2-valued logic | Jannis Harder | 2022-11-30 | 7 | -0/+2001 | |
| | | * | | | | sim: Improved global clock handling | Jannis Harder | 2022-11-30 | 1 | -13/+14 | |
| | | * | | | | opt_expr: Optimizations for `$bweqx` and `$bwmux` | Jannis Harder | 2022-11-30 | 1 | -0/+63 | |
| | | * | | | | Add bwmuxmap pass | Jannis Harder | 2022-11-30 | 7 | -0/+76 | |
| | | * | | | | Add bitwise `$bweqx` and `$bwmux` cells | Jannis Harder | 2022-11-30 | 9 | -11/+179 | |
| | | * | | | | verilog_backend: Do not run bmuxmap or demuxmap in -noexpr mode. | Jannis Harder | 2022-11-30 | 1 | -2/+4 | |
| | | * | | | | verilog_backend: Correctly sign extend output of signed `$modfloor` | Jannis Harder | 2022-11-30 | 1 | -2/+2 | |
| | | * | | | | verilog_backend: Add -noparallelcase option | Jannis Harder | 2022-11-30 | 1 | -7/+31 | |
| | | * | | | | simlib: Use optional SIMLIB_GLOBAL_CLOCK to define a global clock signal | Jannis Harder | 2022-11-30 | 1 | -2/+8 | |
| | | * | | | | simlib: Silence iverilog warning for `$lut` | Jannis Harder | 2022-11-30 | 1 | -1/+1 | |
| | | * | | | | simlib: Fix wide $bmux and avoid iverilog warnings | Jannis Harder | 2022-11-30 | 1 | -2/+2 | |
| | | * | | | | satgen, simlib: Consistent x-propagation for `$pmux` cells | Jannis Harder | 2022-11-30 | 2 | -18/+20 | |
| | | * | | | | opt_expr: Fix shift/shiftx optimizations | Jannis Harder | 2022-11-30 | 1 | -3/+3 | |
| | | * | | | | opt_expr: Constant fold mux, pmux, bmux, demux, eqx, nex cells | Jannis Harder | 2022-11-29 | 1 | -0/+33 | |
| | | * | | | | opt_expr: Optimize bitwise logic ops with one fully const input | Jannis Harder | 2022-11-29 | 1 | -0/+81 | |
| | | * | | | | simplemap: Map `$xnor` to `$_XNOR_` cells | Jannis Harder | 2022-11-29 | 3 | -20/+5 | |
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| | | * / / | Add insbuf -chain mode | Claire Xenia Wolf | 2022-12-01 | 1 | -2/+38 | |
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| * | | | | Bump version | github-actions[bot] | 2022-12-01 | 1 | -1/+1 | |
| * | | | | Merge pull request #3551 from daglem/struct-array-swapped-range | Jannis Harder | 2022-12-01 | 3 | -21/+192 | |
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| | * | | | Added asserts for current limitation of array dimensions in packed structs | Dag Lem | 2022-11-30 | 1 | -0/+8 | |
| | * | | | Check for all cases of currently unsupported array dimensions in packed structs | Dag Lem | 2022-11-30 | 1 | -10/+13 | |
| | * | | | Tests for unpacked arrays in packed structs are for the Yosys frontend only | Dag Lem | 2022-11-23 | 1 | -0/+4 | |
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index : iCE40/yosys | |
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