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| | * | Resolve TODO with pin assignments for SRL*Eddie Hung2019-09-041-4/+2
| | * | Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-09-046-5/+63
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| | * | | Add commentsEddie Hung2019-09-021-1/+9
| | * | | Rename boxEddie Hung2019-09-021-1/+1
| | * | | Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-09-027-22/+21
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| | * | | | Make abc9 test a bit more interestingEddie Hung2019-08-301-1/+3
| | * | | | Recognise built-in types (e.g. $_DFF_*)Eddie Hung2019-08-301-3/+3
| | * | | | Remove trailing spaceEddie Hung2019-08-301-2/+2
| | * | | | Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-08-3041-33/+798
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| | * \ \ \ \ Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-08-301-1/+1
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| | * \ \ \ \ \ Merge branch 'eddie/xilinx_srl' into xaig_arrivalEddie Hung2019-08-301-4/+0
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| | * \ \ \ \ \ \ Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-08-3012-111/+152
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| | * | | | | | | | Use a dummy box file if none specifiedEddie Hung2019-08-283-3/+10
| | * | | | | | | | Comment out SB_MAC16 arrival time for now, need to handle all its modesEddie Hung2019-08-281-1/+1
| | * | | | | | | | Add arrival for SB_MAC16.OEddie Hung2019-08-281-0/+1
| | * | | | | | | | Add arrival times for UEddie Hung2019-08-281-0/+26
| | * | | | | | | | LX -> LPEddie Hung2019-08-281-1/+1
| | * | | | | | | | Round not floorEddie Hung2019-08-281-21/+21
| | * | | | | | | | Add LP timingsEddie Hung2019-08-281-0/+26
| | * | | | | | | | LX -> LPEddie Hung2019-08-281-1/+1
| | * | | | | | | | Merge remote-tracking branch 'origin/eddie/fix_carry_wrapper' into xaig_arrivalEddie Hung2019-08-281-0/+20
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| | * | | | | | | | | Do not overwrite LUT paramEddie Hung2019-08-281-1/+0
| | * | | | | | | | | Add SB_CARRY to ice40_opt testEddie Hung2019-08-281-3/+5
| | * | | | | | | | | Add ice40_opt testEddie Hung2019-08-281-0/+24
| | * | | | | | | | | Revert "Revert "Fix omode which inserts an output if none exists (otherwise a...Eddie Hung2019-08-281-7/+8
| | * | | | | | | | | Revert "Output "h" extension only if boxes"Eddie Hung2019-08-281-32/+28
| | * | | | | | | | | Merge remote-tracking branch 'origin/eddie/fix_carry_wrapper' into xaig_arrivalEddie Hung2019-08-282-1/+48
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| | * | | | | | | | | | Add arrival times for HX devicesEddie Hung2019-08-281-21/+114
| | * | | | | | | | | | Specify ice40 family to cells_sim.v using defineEddie Hung2019-08-281-1/+8
| | * | | | | | | | | | Merge remote-tracking branch 'origin/eddie/fix_carry_wrapper' into xaig_arrivalEddie Hung2019-08-285-68/+20
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| | * | | | | | | | | | | Account for D port being a constantEddie Hung2019-08-281-4/+4
| | * | | | | | | | | | | Merge branch 'eddie/xilinx_srl' into xaig_arrivalEddie Hung2019-08-2813-225/+819
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| | * \ \ \ \ \ \ \ \ \ \ \ Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-08-2833-409/+1901
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| | * \ \ \ \ \ \ \ \ \ \ \ \ Merge branch 'xaig_arrival' of github.com:YosysHQ/yosys into xaig_arrivalEddie Hung2019-08-232-14/+1
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| | | * | | | | | | | | | | | | Revert to upstreamEddie Hung2019-08-231-2/+2
| | | * | | | | | | | | | | | | Fix spacingEddie Hung2019-08-231-1/+1
| | | * | | | | | | | | | | | | Remove unused modelEddie Hung2019-08-231-13/+0
| | * | | | | | | | | | | | | | CleanupEddie Hung2019-08-231-130/+59
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| | * | | | | | | | | | | | | Put attributes above portEddie Hung2019-08-232-27/+62
| | * | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-08-2328-114/+1110
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| | * | | | | | | | | | | | | | Use semicolonEddie Hung2019-08-211-1/+1
| | * | | | | | | | | | | | | | techmap before readEddie Hung2019-08-211-1/+1
| | * | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-08-210-0/+0
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| | * \ \ \ \ \ \ \ \ \ \ \ \ \ \ Merge remote-tracking branch 'origin/master' into xaig_arrivalEddie Hung2019-08-212-2/+2
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| | * | | | | | | | | | | | | | | | Output "h" extension only if boxesEddie Hung2019-08-211-28/+32
| | * | | | | | | | | | | | | | | | Revert "Fix omode which inserts an output if none exists (otherwise abc9 brea...Eddie Hung2019-08-211-8/+7
| | * | | | | | | | | | | | | | | | Add abc_arrival to SRL*Eddie Hung2019-08-211-3/+5
| | * | | | | | | | | | | | | | | | Fix omode which inserts an output if none exists (otherwise abc9 breaks)Eddie Hung2019-08-201-7/+8
| | * | | | | | | | | | | | | | | | Revert "Only xaig if GetSize(output_bits) > 0"Eddie Hung2019-08-201-149/+147
| | * | | | | | | | | | | | | | | | Only xaig if GetSize(output_bits) > 0Eddie Hung2019-08-201-147/+149