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* Add comment about supporting $dffe in ice40_dspEddie Hung2019-08-011-0/+1
* Pack P register properlyEddie Hung2019-08-011-2/+4
* Trim Y_WIDTHEddie Hung2019-08-011-5/+3
* Add DSP_SIGNEDONLY backEddie Hung2019-08-011-0/+16
* DSP_MINWIDTH -> DSP_{A,B,Y}_MINWIDTHEddie Hung2019-08-012-5/+12
* Change $__softmul back to $mulEddie Hung2019-08-011-0/+1
* Cope with sign extension in mul2dspEddie Hung2019-08-012-14/+14
* Revert "Do not do sign extension in techmap; let packer do it"Eddie Hung2019-08-011-5/+14
* Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-08-0125-86/+219
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| * Merge pull request #1236 from YosysHQ/eddie/xc6s_brams_mapEddie Hung2019-08-011-3/+3
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| | * RST -> RSTBRST for RAMB8BWEREddie Hung2019-07-291-3/+3
| * | Merge pull request #1233 from YosysHQ/clifford/deferClifford Wolf2019-07-312-49/+21
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| | * Update README to use "read" instead of "read_verilog"Clifford Wolf2019-07-291-48/+19
| | * Call "read_verilog" with -defer from "read"Clifford Wolf2019-07-291-1/+2
| * | Merge pull request #1228 from YosysHQ/dave/yy_buf_sizeEddie Hung2019-07-291-0/+3
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| | * | verilog_lexer: Increase YY_BUF_SIZE to 65536David Shah2019-07-261-0/+3
| * | | Merge pull request #1234 from mmicko/fix_gzip_no_existDavid Shah2019-07-291-19/+21
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| | * | Fix case when file does not existMiodrag Milanovic2019-07-291-19/+21
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| * | Merge pull request #1226 from YosysHQ/dave/gzipDavid Shah2019-07-278-13/+70
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| | * Update CHANGELOGDavid Shah2019-07-261-1/+1
| | * Fix frontend auto-detection for gzipped inputDavid Shah2019-07-261-9/+12
| | * Add support for reading gzip'd input filesDavid Shah2019-07-266-3/+57
| * | Merge branch 'master' of github.com:YosysHQ/yosysEddie Hung2019-07-2517-29/+360
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| | * \ Merge branch 'ZirconiumX-synth_intel_m9k'Clifford Wolf2019-07-254-5/+11
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| | | * | intel: Map M9K BRAM only on families that have itDan Ravensloft2019-07-234-5/+12
| | * | | Merge pull request #1218 from ZirconiumX/synth_intel_iopadsClifford Wolf2019-07-251-8/+8
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| | | * | | intel: Make -noiopads the defaultDan Ravensloft2019-07-241-8/+8
| | * | | | Merge pull request #1219 from jakobwenzel/objIteratorClifford Wolf2019-07-252-3/+20
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| | | * | | | replaced std::iterator with using statementsJakob Wenzel2019-07-251-6/+6
| | | * | | | made ObjectIterator extend std::iteratorJakob Wenzel2019-07-242-2/+19
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| | * | | | Merge pull request #1224 from YosysHQ/xilinx_fix_ffEddie Hung2019-07-251-2/+2
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| | | * | | xilinx: Fix missing cell name underscore in cells_map.vDavid Shah2019-07-251-2/+2
| | * | | | Merge pull request #1222 from koriakin/s6-exampleEddie Hung2019-07-245-0/+47
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| | | * | | Add a simple example for Spartan 6Marcin Koƛcielnicki2019-07-245-0/+47
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| | * | | Merge pull request #1212 from YosysHQ/eddie/signed_ice40_dspEddie Hung2019-07-233-9/+241
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| | * \ \ \ Merge pull request #1214 from jakobwenzel/astmod_cloneEddie Hung2019-07-221-0/+2
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| | | * | | initialize noblackbox and nowb in AstModule::cloneJakob Wenzel2019-07-221-0/+2
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| | * | | Add "stat -tech cmos"Clifford Wolf2019-07-201-2/+29
| * | | | Bump abc to fix &mfs bugEddie Hung2019-07-251-1/+1
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* | | | Fix B_WIDTH > DSP_B_MAXWIDTH caseEddie Hung2019-08-011-32/+14
* | | | CO is sign extension only if signed multiplierEddie Hung2019-08-011-1/+6
* | | | Fix typoEddie Hung2019-08-011-1/+1
* | | | Do not compute sign bit if result is zeroEddie Hung2019-07-311-1/+2
* | | | For signed multipliers, compute sign bit separately...Eddie Hung2019-07-311-23/+42
* | | | Restore old CO behaviourEddie Hung2019-07-311-6/+7
* | | | Helper: SigSpec::operator[] to accept negative indicesEddie Hung2019-07-311-2/+2
* | | | Fix spacingEddie Hung2019-07-261-3/+3
* | | | Update test_autotb doc to reflect default value of zeroEddie Hung2019-07-261-1/+3
* | | | Add doc for "test_autotb -seed" optionEddie Hung2019-07-261-0/+3
* | | | Pop the CO bit from OEddie Hung2019-07-261-1/+3