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* | Moved patmatch() to yosys.ccClifford Wolf2014-10-106-95/+65
* | Replaced fnmatch() with patmatch()Clifford Wolf2014-10-104-18/+105
* | Added format __attribute__ to stringf()Clifford Wolf2014-10-105-6/+8
* | Renamed TRUE/FALSE to CONST_TRUE/CONST_FALSE because of name collision on Win32Clifford Wolf2014-10-105-118/+118
* | Renamed SIZE() to GetSize() because of name collision on Win32Clifford Wolf2014-10-1048-447/+447
* | Replaced "#ifdef WIN32" with "#ifdef _WIN32"Clifford Wolf2014-10-092-4/+4
* | Added API for generic cell cost calculationsClifford Wolf2014-10-092-15/+100
* | added .exe and .html output files to .gitignoreClifford Wolf2014-10-091-0/+4
* | No rusage on win32Clifford Wolf2014-10-092-2/+13
* | Added mxe-based cross build for win32Clifford Wolf2014-10-092-6/+24
* | Fixes in "hilomap" help messageClifford Wolf2014-10-081-4/+2
* | sort cell types in "stat" output by nameClifford Wolf2014-10-031-2/+2
* | sat encoding for exclusive $pmux ctrl inputs in "share" passClifford Wolf2014-10-031-4/+16
* | satgen import sigbit apiClifford Wolf2014-10-031-1/+17
* | added resource sharing of $macc cellsClifford Wolf2014-10-032-3/+270
* | Added $_BUF_ cell typeClifford Wolf2014-10-035-5/+19
* | remove buffers in opt_cleanClifford Wolf2014-10-031-0/+13
* | resource sharing of $alu cellsClifford Wolf2014-10-031-3/+21
* | set "keep" on modules with $assert cells in "hierarchy"Clifford Wolf2014-09-301-0/+30
* | Added support for "keep" on modulesClifford Wolf2014-09-294-2/+9
* | namespace YosysClifford Wolf2014-09-2796-557/+850
* | Merge pull request #39 from ahmedirfan1983/masterClifford Wolf2014-09-222-9/+62
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| | * Merge branch 'btor' of https://github.com/ahmedirfan1983/yosys into btorAhmed Irfan2015-04-030-0/+0
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| | | * corrected abstract of appnoteAhmed Irfan2014-11-031-5/+5
| | | * removed unused bibAhmed Irfan2014-11-031-12/+12
| | | * corrections in appnoteAhmed Irfan2014-11-031-1/+2
| | | * appnote addedAhmed Irfan2014-11-031-0/+434
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| | * appnote for verilog to btorAhmed Irfan2015-04-031-0/+435
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| * Merge branch 'master' of https://github.com/cliffordwolf/yosys into btorAhmed Irfan2014-09-22513-12050/+34829
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* | Re-enabled assert for new logic loops in "share" passClifford Wolf2014-09-211-4/+1
* | Various improvements regarding logic loops in "share" resultsClifford Wolf2014-09-211-37/+108
* | Logic loop bugfix for "share" passClifford Wolf2014-09-211-3/+7
* | Added "share -limit"Clifford Wolf2014-09-211-1/+13
* | Still loop bug in "share": changed assert to warningClifford Wolf2014-09-211-13/+25
* | Do not introduce new logic loops in "share"Clifford Wolf2014-09-211-6/+47
* | Assert on new logic loops in "share" passClifford Wolf2014-09-212-1/+49
* | Added "test_abcloop" commandClifford Wolf2014-09-192-0/+286
* | Initialize RTLIL::Const from std::vector<bool>Clifford Wolf2014-09-192-1/+9
* | Sorting of object names in ilang backendClifford Wolf2014-09-192-21/+49
* | Small improvements in "abc" command handle_loops() functionClifford Wolf2014-09-191-6/+9
* | Using "NOT" instead of "INV" as cell name in default abc genlib fileClifford Wolf2014-09-191-2/+2
* | Alphabetically sort port names in "show" outputClifford Wolf2014-09-191-0/+3
* | Do not run "scorr" in "abc -fast"Clifford Wolf2014-09-181-4/+4
* | Improvements in "synth" scriptClifford Wolf2014-09-181-8/+12
* | Added "abc -fast"Clifford Wolf2014-09-181-6/+31
* | Added commit count to devel version numberClifford Wolf2014-09-171-1/+1
* | Fixed $_NOR vs. $_NOR_ typo in abc.ccClifford Wolf2014-09-161-1/+1
* | Fixed $memwr/$memrd order in memory_dffClifford Wolf2014-09-161-4/+6
* | Added new CodingReadme file (replaces CodingStyle and CHECKLISTS)Clifford Wolf2014-09-163-65/+84
* | Fixed $macc simlib model for zero-configClifford Wolf2014-09-161-1/+1
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