| Commit message (Collapse) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | Add consteval support for $_ANDNOT_ and $_ORNOT_ | Clifford Wolf | 2017-08-22 | 1 | -0/+4 | |
| | | ||||||
| * | Remove some dead code from fsm_map | Clifford Wolf | 2017-08-21 | 1 | -3/+0 | |
| | | ||||||
| * | Rename "singleton" pass to "uniquify" | Clifford Wolf | 2017-08-20 | 3 | -21/+22 | |
| | | ||||||
| * | More intuitive handling of "cd .." for singleton modules | Clifford Wolf | 2017-08-19 | 1 | -2/+38 | |
| | | ||||||
| * | Add "sim -zinit -rstlen" | Clifford Wolf | 2017-08-18 | 1 | -1/+53 | |
| | | ||||||
| * | Merge branch 'sim' | Clifford Wolf | 2017-08-18 | 4 | -0/+848 | |
| |\ | ||||||
| | * | Add "sim" support for memories | Clifford Wolf | 2017-08-18 | 1 | -2/+136 | |
| | | | ||||||
| | * | Add Const methods is_fully_zero(), is_fully_def(), and is_fully_undef() | Clifford Wolf | 2017-08-18 | 2 | -0/+37 | |
| | | | ||||||
| | * | Add support for assert/assume/cover to "sim" command | Clifford Wolf | 2017-08-18 | 1 | -4/+47 | |
| | | | ||||||
| | * | Add writeback mode to "sim" command | Clifford Wolf | 2017-08-17 | 1 | -0/+44 | |
| | | | ||||||
| | * | Improve "sim" command | Clifford Wolf | 2017-08-17 | 1 | -54/+272 | |
| | | | ||||||
| | * | Add "sim" command skeleton | Clifford Wolf | 2017-08-16 | 2 | -0/+372 | |
| | | | ||||||
| * | | Merge pull request #386 from azonenberg/gpak-counters | Clifford Wolf | 2017-08-16 | 1 | -73/+82 | |
| |\ \ | |/ |/| | Bug fixes to GP_COUNTx and GP_PGEN cells in GreenPAK technology library | |||||
| | * | Fixed more issues with GreenPAK counter sim models | Andrew Zonenberg | 2017-08-15 | 1 | -19/+23 | |
| | | | ||||||
| | * | Updated PGEN model to have level triggered reset (matches actual hardware ↵ | Andrew Zonenberg | 2017-08-15 | 1 | -4/+4 | |
| | | | | | | | | | behavior | |||||
| | * | Fixed bug in GP_COUNTx model | Andrew Zonenberg | 2017-08-15 | 1 | -7/+12 | |
| | | | ||||||
| | * | Fixed bug where GP_COUNTx_ADV would wrap even when KEEP was high | Andrew Zonenberg | 2017-08-15 | 1 | -47/+47 | |
| |/ | ||||||
| * | Merge branch 'azonenberg-rmports' | Clifford Wolf | 2017-08-15 | 2 | -0/+188 | |
| |\ | ||||||
| | * | Mostly coding style related fixes in rmports pass | Clifford Wolf | 2017-08-15 | 1 | -30/+33 | |
| | | | ||||||
| | * | Merge branch 'rmports' of https://github.com/azonenberg/yosys into ↵ | Clifford Wolf | 2017-08-15 | 2 | -0/+185 | |
| |/| | | | | | | | azonenberg-rmports | |||||
| | * | rmports: Now remove ports from cell instances if we optimized them out of ↵ | Andrew Zonenberg | 2017-08-14 | 1 | -2/+35 | |
| | | | | | | | | | that cell | |||||
| | * | ProcessModule is no longer virtual (why was it in the first place?) | Andrew Zonenberg | 2017-08-14 | 1 | -1/+1 | |
| | | | ||||||
| | * | rmports now works on all modules in the design, not just the top. | Andrew Zonenberg | 2017-08-14 | 1 | -4/+7 | |
| | | | ||||||
| | * | Updated Makefile to reflect opt_rmports being renamed to rmports | Andrew Zonenberg | 2017-08-14 | 1 | -1/+1 | |
| | | | ||||||
| | * | Renamed opt_rmports pass to rmports | Andrew Zonenberg | 2017-08-14 | 1 | -5/+5 | |
| | | | ||||||
| | * | Improved handling of constant connections in opt_rmports | Andrew Zonenberg | 2017-08-14 | 1 | -0/+2 | |
| | | | ||||||
| | * | Fixed handling of cell ports that aren't wires | Andrew Zonenberg | 2017-08-14 | 1 | -0/+3 | |
| | | | ||||||
| | * | opt_rmports: Fixed incorrect handling of multi-bit nets | Andrew Zonenberg | 2017-08-14 | 1 | -12/+27 | |
| | | | ||||||
| | * | Removed commented out debug code | Andrew Zonenberg | 2017-08-14 | 1 | -4/+0 | |
| | | | ||||||
| | * | Added opt_rmports pass (remove unconnected ports from top-level modules) | Andrew Zonenberg | 2017-08-14 | 2 | -0/+133 | |
| | | | ||||||
| * | | Merge pull request #381 from azonenberg/countfix | Clifford Wolf | 2017-08-14 | 4 | -504/+900 | |
| |\ \ | | | | | | | Added better behavioral models for GreenPAK counters. Refactored cells_sim into two files so analog/mixed signal stuff is separate | |||||
| | * | | Fixed typo in GP_COUNT8 sim model | Andrew Zonenberg | 2017-08-14 | 1 | -1/+1 | |
| | | | | ||||||
| | * | | Fixed typo in error message | Andrew Zonenberg | 2017-08-14 | 1 | -1/+1 | |
| | | | | ||||||
| | * | | Changed LEVEL resets for GP_COUNTx to be properly synthesizeable | Andrew Zonenberg | 2017-08-14 | 1 | -48/+60 | |
| | | | | ||||||
| | * | | Changed LEVEL resets to be edge triggered anyway | Andrew Zonenberg | 2017-08-14 | 1 | -4/+4 | |
| | | | | ||||||
| | * | | Added level-triggered reset support to GP_COUNTx simulation models | Andrew Zonenberg | 2017-08-14 | 1 | -2/+68 | |
| | | | | ||||||
| | * | | Fixed undeclared "count" in GP_COUNT8_ADV | Andrew Zonenberg | 2017-08-14 | 1 | -0/+2 | |
| | | | | ||||||
| | * | | Fixed undeclared "count" in GP_COUNT14_ADV | Andrew Zonenberg | 2017-08-14 | 1 | -0/+2 | |
| | | | | ||||||
| | * | | Fixed typo in last commit | Andrew Zonenberg | 2017-08-14 | 1 | -3/+3 | |
| | | | | ||||||
| | * | | Finished initial GP_COUNT8/14/8_ADV/14_ADV sim models. Don't support clock ↵ | Andrew Zonenberg | 2017-08-14 | 2 | -37/+293 | |
| | | | | | | | | | | | | | divide, but do everything else. | |||||
| | * | | Fixed typo in COUNT8 model | Andrew Zonenberg | 2017-08-14 | 1 | -2/+2 | |
| | | | | ||||||
| | * | | Moved GP_POR out of digital cells b/c it has delays | Andrew Zonenberg | 2017-08-14 | 2 | -21/+21 | |
| | | | | ||||||
| | * | | Improved cells_sim_digital model for GP_COUNT8 | Andrew Zonenberg | 2017-08-14 | 2 | -40/+75 | |
| | | | | ||||||
| | * | | Refactored GreenPAK4 cells_sim into cells_sim_ams and cells_sim_digital | Andrew Zonenberg | 2017-08-14 | 4 | -428/+451 | |
| | |/ | ||||||
| * | | Merge pull request #383 from azonenberg/abcfnames | Clifford Wolf | 2017-08-14 | 1 | -0/+3 | |
| |\ \ | | | | | | | abc: Allow +/ filenames in the abc command | |||||
| | * | | abc: Allow +/ filenames in the abc command | Robert Ou | 2017-08-14 | 1 | -0/+3 | |
| | |/ | ||||||
| * | | Merge pull request #382 from azonenberg/jsoniofix | Clifford Wolf | 2017-08-14 | 1 | -0/+1 | |
| |\ \ | | | | | | | json: Parse inout correctly rather than as an output | |||||
| | * | | json: Parse inout correctly rather than as an output | Robert Ou | 2017-08-14 | 1 | -0/+1 | |
| | |/ | ||||||
| * | | Merge pull request #384 from azonenberg/crtechlib | Clifford Wolf | 2017-08-14 | 1 | -2/+66 | |
| |\ \ | |/ |/| | CoolRunner-II technology library improvements | |||||
| | * | coolrunner2: Add INVERT parameter to some BUFGs | Robert Ou | 2017-08-14 | 1 | -2/+6 | |
| | | | ||||||
 |
index : iCE40/yosys | |
| [no description] |
| aboutsummaryrefslogtreecommitdiffstats |