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| author | Andrew Zonenberg <azonenberg@drawersteak.com> | 2017-08-11 16:55:31 -0700 |
|---|---|---|
| committer | Andrew Zonenberg <azonenberg@drawersteak.com> | 2017-08-14 10:45:40 -0700 |
| commit | 348acbd968193d6daaf53a16147b9bea932c92fb (patch) | |
| tree | 26c73dfe57d28a5c6dd2f1dcb4f210bbd97f5431 | |
| parent | c205d571df90b7bdca5207e441dec5e1dabdc2ed (diff) | |
| download | yosys-348acbd968193d6daaf53a16147b9bea932c92fb.tar.gz yosys-348acbd968193d6daaf53a16147b9bea932c92fb.tar.bz2 yosys-348acbd968193d6daaf53a16147b9bea932c92fb.zip | |
Fixed typo in GP_COUNT8 sim model
| -rw-r--r-- | techlibs/greenpak4/cells_sim_digital.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/greenpak4/cells_sim_digital.v b/techlibs/greenpak4/cells_sim_digital.v index cda83862a..3ed80005b 100644 --- a/techlibs/greenpak4/cells_sim_digital.v +++ b/techlibs/greenpak4/cells_sim_digital.v @@ -411,7 +411,7 @@ module GP_COUNT8( //Combinatorially output underflow flag whenever we wrap low always @(*) begin OUT <= (count == 8'h0); - OUT <= count; + POUT <= count; end //POR or SYSRST reset value is COUNT_TO. Datasheet is unclear but conversations w/ Silego confirm. |