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* | | Merge pull request #3335 from programmerjake/divfloor-in-write_smt2Jannis Harder2022-05-251-0/+21
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| * | | add $divfloor support to write_smt2Jacob Lifshay2022-05-241-0/+21
* | | | Merge pull request #3138 from DanielG/fix-git-revMiodrag Milanović2022-05-253-0/+13
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| * | | | Make GIT_REV logic work in release tarballsDaniel Gröber2022-05-253-0/+13
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* / / / verilog: fix signedness when removing unreachable casesJannis Harder2022-05-243-0/+39
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* | | Bump versiongithub-actions[bot]2022-05-241-1/+1
* | | Merge pull request #3332 from YosysHQ/verific_fMiodrag Milanović2022-05-231-20/+25
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| * | | fix text to fit 80 columnsMiodrag Milanovic2022-05-231-6/+9
| * | | Update verific command file documentationMiodrag Milanovic2022-05-231-17/+19
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* | | Use analysis mode if set in fileMiodrag Milanovic2022-05-231-2/+2
* | | Merge pull request #3331 from YosysHQ/git_rev_fixMiodrag Milanović2022-05-231-1/+1
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| * | | Change way to get commit shaJannis Harder2022-05-231-1/+1
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* | | abc9_ops: Don't leave unused derived modules lying aroundgatecat2022-05-231-0/+9
* | | Bump versiongithub-actions[bot]2022-05-211-1/+1
* | | Merge pull request #3324 from jix/confusing-select-errorsJannis Harder2022-05-201-8/+10
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| * | | select: Fix -assert-none and -assert-any error output and docsJannis Harder2022-05-191-8/+10
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* | | Bump versiongithub-actions[bot]2022-05-191-1/+1
* | | Add memory_bmux2rom pass.Marcelina Kościelnicka2022-05-184-1/+124
* | | Add memory_libmap tests.Marcelina Kościelnicka2022-05-1822-0/+1500
* | | gatemate: Use `memory_libmap` pass.Marcelina Kościelnicka2022-05-183-781/+927
* | | machxo2: Use `memory_libmap` pass.Marcelina Kościelnicka2022-05-187-1/+578
* | | efinix: Use `memory_libmap` pass.Marcelina Kościelnicka2022-05-184-102/+164
* | | anlogic: Use `memory_libmap` pass.Marcelina Kościelnicka2022-05-189-303/+585
* | | ice40: Use `memory_libmap` pass.Marcelina Kościelnicka2022-05-189-514/+293
* | | xilinx: Use `memory_libmap` pass.Marcelina Kościelnicka2022-05-1840-2315/+4540
* | | gowin: Use `memory_libmap` pass.Marcelina Kościelnicka2022-05-189-266/+576
* | | nexus: Use `memory_libmap` pass.Marcelina Kościelnicka2022-05-1811-519/+679
* | | ecp5: Use `memory_libmap` pass.Marcelina Kościelnicka2022-05-1810-601/+602
* | | Add memory_libmap pass.Marcelina Kościelnicka2022-05-186-0/+3884
* | | proc_rom: Add special handling of const-0 address bits.Marcelina Kościelnicka2022-05-182-15/+186
* | | Bump versiongithub-actions[bot]2022-05-181-1/+1
* | | Merge pull request #3310 from robinsonb5-PRs/masterMiodrag Milanović2022-05-171-0/+2
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| * | | Use log_warning when Tcl_Init fails, report error with Tcl_ErrnoMsg.Alastair M. Robinson2022-05-161-1/+1
| * | | Now calls Tcl_Init after creating the interp, fixes clock format.Alastair M. Robinson2022-05-101-0/+2
* | | | opt_ffinv: Use ModIndex instead of ModWalker.Marcelina Kościelnicka2022-05-171-50/+53
* | | | Merge pull request #3314 from jix/sva_value_change_logic_wideJannis Harder2022-05-163-9/+72
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| * | | | verific: Use new value change logic also for $stable of wide signals.Jannis Harder2022-05-113-9/+72
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* | | | Bump versiongithub-actions[bot]2022-05-141-1/+1
* | | | Add opt_ffinv pass.Marcelina Kościelnicka2022-05-134-3/+268
* | | | Bump versiongithub-actions[bot]2022-05-131-1/+1
* | | | Add proc_rom pass.Marcelina Kościelnicka2022-05-135-1/+283
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* | | Bump versiongithub-actions[bot]2022-05-101-1/+1
* | | Merge pull request #3305 from jix/sva_value_change_logicJannis Harder2022-05-098-11/+121
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| * | | verific: Improve logic generated for SVA value change expressionsJannis Harder2022-05-098-11/+121
* | | | Merge pull request #3297 from jix/sva_nested_clk_elseJannis Harder2022-05-094-5/+27
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| * | | | verific: Fix conditions of SVAs with explicit clocks within proceduresJannis Harder2022-05-034-5/+27
* | | | | Next dev cycleMiodrag Milanovic2022-05-092-2/+5
* | | | | Release version 0.17Miodrag Milanovic2022-05-092-3/+3
* | | | | Update CHANGELOGMiodrag Milanovic2022-05-091-0/+3
* | | | | Update manualMiodrag Milanovic2022-05-091-0/+44
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