| Commit message (Expand) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | | | | | Merge pull request #1973 from YosysHQ/eddie/fix1966 | Eddie Hung | 2020-04-22 | 2 | -2/+4 | |
| |\ \ \ \ \ | ||||||
| | * | | | | | yosys-config: spelling | Eddie Hung | 2020-04-22 | 1 | -1/+1 | |
| | * | | | | | tests: use `yosys-config --datdir` instead of hard-coded | Eddie Hung | 2020-04-22 | 1 | -1/+3 | |
| | | |_|/ / | |/| | | | ||||||
| * | | | | | Merge pull request #1950 from YosysHQ/eddie/design_import | Eddie Hung | 2020-04-22 | 3 | -7/+30 | |
| |\ \ \ \ \ | ||||||
| | * | | | | | design: add test | Eddie Hung | 2020-04-16 | 2 | -5/+22 | |
| | * | | | | | design: -import to not count black/white-boxes as candidates for top | Eddie Hung | 2020-04-16 | 1 | -2/+8 | |
| | | |_|/ / | |/| | | | ||||||
| * | | | | | Merge pull request #1976 from YosysHQ/dave/fix-sim-const | Claire Wolf | 2020-04-22 | 2 | -1/+18 | |
| |\ \ \ \ \ | ||||||
| | * | | | | | sim: Fix handling of constant-connected cell inputs at startup | David Shah | 2020-04-21 | 2 | -1/+18 | |
| * | | | | | | Merge pull request #1979 from whitequark/cxxrtl-go-faster | Claire Wolf | 2020-04-22 | 2 | -184/+396 | |
| |\ \ \ \ \ \ | ||||||
| | * | | | | | | cxxrtl: run edge detectors only once in eval(). | whitequark | 2020-04-22 | 1 | -6/+22 | |
| | * | | | | | | cxxrtl: add an unsupported knob for manipulating clock trees. | whitequark | 2020-04-22 | 1 | -0/+18 | |
| | * | | | | | | cxxrtl: use log_id() where appropriate. NFC. | whitequark | 2020-04-21 | 1 | -4/+4 | |
| | * | | | | | | cxxrtl: add (*cxxrtl.{comb,sync}*) annotations on black box outputs. | whitequark | 2020-04-21 | 1 | -65/+186 | |
| | * | | | | | | cxxrtl: s/sync_{wire,type}/edge_{wire,type}/. NFC. | whitequark | 2020-04-21 | 1 | -23/+23 | |
| | * | | | | | | cxxrtl: use one delta cycle for immediately converging netlists. | whitequark | 2020-04-21 | 2 | -11/+21 | |
| | * | | | | | | cxxrtl: add -O6, a shortcut for running `proc; flatten`. | whitequark | 2020-04-21 | 1 | -4/+14 | |
| | * | | | | | | cxxrtl: unbuffer module input wires. | whitequark | 2020-04-21 | 1 | -31/+61 | |
| | * | | | | | | cxxrtl: simplify generated edge detection logic. | whitequark | 2020-04-21 | 1 | -56/+29 | |
| | * | | | | | | cxxrtl: localize wires with multiple comb drivers, too. | whitequark | 2020-04-21 | 1 | -32/+31 | |
| | * | | | | | | cxxrtl: detect buffered comb wires, not just feedback wires. | whitequark | 2020-04-21 | 1 | -5/+40 | |
| * | | | | | | | bugpoint: Don't remove modules or cells while iterating over them. | Marcelina Kościelnicka | 2020-04-22 | 1 | -4/+14 | |
| * | | | | | | | intel_alm: Documentation improvements | Dan Ravensloft | 2020-04-21 | 3 | -14/+127 | |
| | |_|_|_|_|/ |/| | | | | | ||||||
| * | | | | | | write_json: dump default parameter values | Marcelina Kościelnicka | 2020-04-21 | 1 | -0/+10 | |
| * | | | | | | Use default parameter value in getParam | Marcelina Kościelnicka | 2020-04-21 | 2 | -4/+13 | |
| * | | | | | | hierarchy: Convert positional parameters to named. | Marcelina Kościelnicka | 2020-04-21 | 2 | -3/+50 | |
| * | | | | | | ilang, ast: Store parameter order and default value information. | Marcelina Kościelnicka | 2020-04-21 | 6 | -9/+27 | |
| * | | | | | | idict: Make iterator go forward. | Marcelina Kościelnicka | 2020-04-21 | 1 | -5/+19 | |
| * | | | | | | Merge pull request #1971 from YosysHQ/claire/edifkeep | Claire Wolf | 2020-04-21 | 1 | -14/+108 | |
| |\ \ \ \ \ \ | ||||||
| | * | | | | | | Improve net priorities in EDIF back-end | Claire Wolf | 2020-04-21 | 1 | -0/+64 | |
| | * | | | | | | Ignore conflicting keep attributes, unless asked not to. Fixes #1733 | Claire Wolf | 2020-04-20 | 1 | -14/+44 | |
| | | |_|_|/ / | |/| | | | | ||||||
| * | | | | | | Merge pull request #1851 from YosysHQ/claire/bitselwrite | Claire Wolf | 2020-04-21 | 17 | -15/+1431 | |
| |\ \ \ \ \ \ | |_|/ / / / |/| | | | | | ||||||
| | * | | | | | Merge pull request #1975 from dh73/claire/bitselwrite | Eddie Hung | 2020-04-20 | 13 | -0/+1224 | |
| | |\ \ \ \ \ | ||||||
| | | * | | | | | Remove '-ignore_unknown_cells' option from 'sat' | Eddie Hung | 2020-04-20 | 1 | -6/+6 | |
| | | * | | | | | Simplify test case script | Eddie Hung | 2020-04-20 | 1 | -30/+17 | |
| | | * | | | | | Remove ununsed files | Eddie Hung | 2020-04-20 | 5 | -83/+0 | |
| | | * | | | | | Modifications of tests as per Eddie's request | diego | 2020-04-20 | 15 | -78/+1237 | |
| | | * | | | | | Wrong fixed value | diego | 2020-04-17 | 1 | -1/+1 | |
| | | * | | | | | Adding tests for dynamic part select optimisation | diego | 2020-04-16 | 7 | -0/+161 | |
| | |/ / / / / | ||||||
| | * | | | | | Make mask-and-shift the default for bitselwrite | Claire Wolf | 2020-04-16 | 1 | -1/+1 | |
| | * | | | | | Add LookaheadRewriter for proper bitselwrite support | Claire Wolf | 2020-04-16 | 4 | -4/+144 | |
| | * | | | | | Improved rewrite code for writing to bit slice (disabled for now) | Claire Wolf | 2020-04-15 | 1 | -12/+64 | |
| * | | | | | | Merge pull request #1961 from whitequark/paramod-original-name | whitequark | 2020-04-21 | 3 | -11/+7 | |
| |\ \ \ \ \ \ | ||||||
| | * | | | | | | ast, rpc: record original name of $paramod\* as \hdlname attribute. | whitequark | 2020-04-18 | 3 | -11/+7 | |
| * | | | | | | | tests: remove write_ilang | Eddie Hung | 2020-04-20 | 2 | -3/+0 | |
| * | | | | | | | Merge pull request #1972 from YosysHQ/eddie/bug1970 | Eddie Hung | 2020-04-20 | 2 | -16/+52 | |
| |\ \ \ \ \ \ \ | |_|_|/ / / / |/| | | | | | | ||||||
| | * | | | | | | abc9: -prep_lut to be more robust | Eddie Hung | 2020-04-20 | 1 | -16/+33 | |
| | * | | | | | | abc9: add testcase reduced from #1970 | Eddie Hung | 2020-04-20 | 1 | -0/+19 | |
| |/ / / / / / | ||||||
| * | | | | | | Merge pull request #1964 from YosysHQ/claire/sformatf | Claire Wolf | 2020-04-20 | 1 | -8/+38 | |
| |\ \ \ \ \ \ | |_|_|_|_|/ |/| | | | | | ||||||
| | * | | | | | Extend support for format strings in Verilog front-end | Claire Wolf | 2020-04-18 | 1 | -8/+38 | |
| | | |_|/ / | |/| | | | ||||||
| * | | | | | Merge pull request #1967 from whitequark/cxxrtl-blackbox-attributes | whitequark | 2020-04-19 | 2 | -49/+57 | |
| |\ \ \ \ \ | |/ / / / |/| | | | | ||||||
 |
index : iCE40/yosys | |
| clone of https://github.com/YosysHQ/yosys |
| aboutsummaryrefslogtreecommitdiffstats |