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| * | | | verilog: do not warn for attributes on null statementsEddie Hung2020-05-252-6/+4
| * | | | tests: add an generate-else test tooEddie Hung2020-05-251-0/+34
| * | | | verilog: handle empty generate statement by removing gen_stmt_or_null...Eddie Hung2020-05-251-7/+8
| * | | | verilog: fix #2037 by permitting (and freeing) attributes on null stmtEddie Hung2020-05-251-1/+5
| * | | | tests: add #2037 testcaseEddie Hung2020-05-251-0/+9
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* | | | Merge pull request #2015 from boqwxp/qbfsat-bisectionclairexen2020-05-251-98/+207
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| * | | | qbfsat: Remove cruft inadvertently left untouched in commit 86fc49a9d60f9ad4c...Alberto Gonzalez2020-05-231-11/+0
| * | | | qbfsat: Add bisection mode and make it the default.Alberto Gonzalez2020-05-231-87/+207
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* | | | Merge pull request #2075 from YosysHQ/eddie/xaiger_cleanupEddie Hung2020-05-242-7/+14
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| * | | | xaiger: add testcaseEddie Hung2020-05-241-0/+13
| * | | | xaiger: do not derive cellsEddie Hung2020-05-241-7/+1
* | | | | Merge pull request #2074 from YosysHQ/eddie/ecp5_cleanupEddie Hung2020-05-233-14/+0
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| * | | | ecp5: cleanup unused +/ecp5/abc9_model.vEddie Hung2020-05-233-14/+0
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* | | | Merge pull request #2072 from whitequark/cxxrtl-dont-purgewhitequark2020-05-221-8/+2
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| * | | | cxxrtl: get rid of -O5 aka `opt_clean -purge` optimization level.whitequark2020-05-221-8/+2
* | | | | abc9_ops: update commentEddie Hung2020-05-211-1/+1
* | | | | Merge pull request #2057 from YosysHQ/eddie/fix_task_attrEddie Hung2020-05-212-11/+37
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| * | | | | Update frontends/verilog/verilog_parser.yEddie Hung2020-05-211-1/+1
| * | | | | verilog: attributes before task enable (but 13 s/r conflicts)Eddie Hung2020-05-141-10/+8
| * | | | | tests: attributes before task enableEddie Hung2020-05-141-0/+28
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* | | | | Merge pull request #2059 from boqwxp/logger-vector-to-dictMiodrag Milanović2020-05-213-51/+21
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| * | | | log: Use `dict` instead of `std::vector<std::pair>` for `log_expect_{error, w...Alberto Gonzalez2020-05-153-51/+21
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* | | | Merge pull request #2046 from PeterCrozier/trapN. Engelhardt2020-05-201-3/+3
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| * | | | Consolidate Linux and Mac version of YS_DEBUGTRAP_IF_DEBUGGING.Peter Crozier2020-05-131-5/+2
| * | | | Extend YS_DEBUGTRAP to MacOS.Peter Crozier2020-05-131-1/+4
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* | | | Merge pull request #2054 from boqwxp/fix-smtbmcN. Engelhardt2020-05-201-3/+3
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| * | | | smtbmc: Fix typo in error message.Alberto Gonzalez2020-05-191-1/+1
| * | | | smtbmc: Fix return status handling.Alberto Gonzalez2020-05-141-2/+2
* | | | | Add force_downto and force_upto wire attributes.Marcelina Kościelnicka2020-05-1943-27/+258
* | | | | Merge pull request #1926 from YosysHQ/eddie/abc9_auto_dffEddie Hung2020-05-1834-1853/+1656
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| * | | | | abc9: use (* abc9_keep *) instead of (* abc9_scc *); apply to $_DFF_?_Eddie Hung2020-05-145-23/+11
| * | | | | abc9_ops: -prep_hier to create unmap module that removes Q's (* init *)Eddie Hung2020-05-141-4/+6
| * | | | | abc9: preserve $_DFF_?_.Q's (* init *); rely on clean to remove itEddie Hung2020-05-144-25/+13
| * | | | | Fix broken test when ignoring abc9_flop with init == 1'b1Eddie Hung2020-05-141-3/+0
| * | | | | abc9_ops/xaiger: further reducing Module::derive() calls by ...Eddie Hung2020-05-144-135/+121
| * | | | | Cleanup; reduce Module::derive() callsEddie Hung2020-05-144-153/+164
| * | | | | ecp5: latches_map.v if *not* -asyncprldEddie Hung2020-05-141-2/+2
| * | | | | ecp5: synth_ecp5 to no longer need +/ecp5/abc9_{,un}map.vEddie Hung2020-05-144-43/+3
| * | | | | ecp5: fix rebase mistakeEddie Hung2020-05-141-3/+3
| * | | | | abc9: update to =_$abc9_flops pattern which includes whiteboxesEddie Hung2020-05-141-3/+3
| * | | | | abc9_ops: update docsEddie Hung2020-05-141-11/+10
| * | | | | xilinx: gate specify/attributes from iverilogEddie Hung2020-05-141-1/+3
| * | | | | abc9: only do +/abc9_map if `DFFEddie Hung2020-05-142-1/+6
| * | | | | abc9: rework submod -- since it won't move (* keep *) cellsEddie Hung2020-05-142-34/+29
| * | | | | ecp5: TRELLIS_FF bypass path only in async modeEddie Hung2020-05-141-8/+8
| * | | | | timinginfo: ignore $specify2 cells if EN is falseEddie Hung2020-05-141-0/+3
| * | | | | xilinx/ice40/ecp5: zinit requires selected wires, so select them allEddie Hung2020-05-143-4/+4
| * | | | | abc9_ops: move assertEddie Hung2020-05-141-1/+1
| * | | | | abc9: put 'aigmap' backEddie Hung2020-05-141-0/+1
| * | | | | xilinx/ecp5/ice40: add (* abc9_flop *) to bypass-able cellsEddie Hung2020-05-143-4/+198
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