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* techmap: fix error messageEddie Hung2020-04-141-1/+1
* Merge pull request #1922 from whitequark/write_cxxrtl-disconnected-outputswhitequark2020-04-141-0/+2
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| * write_cxxrtl: ignore disconnected module ports.whitequark2020-04-141-0/+2
* | Merge pull request #1921 from whitequark/write_cxxrtl-separate-compilationwhitequark2020-04-142-10/+82
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| * | write_verilog: fix precondition check.whitequark2020-04-141-1/+1
| * | write_cxxrtl: enable separate compilation.whitequark2020-04-141-9/+81
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* | Merge pull request #1917 from YosysHQ/eddie/abc9_delay_checkEddie Hung2020-04-141-0/+4
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| * | xaiger: add check for $__ABC9_DELAY modelEddie Hung2020-04-131-0/+4
* | | Merge pull request #1879 from jjj11x/jjj11x/package_declwhitequark2020-04-143-4/+33
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| * | | support using previously declared types/localparams/params in packageJeff Wang2020-04-073-4/+33
* | | | Merge pull request #1880 from jjj11x/duplicate_enumwhitequark2020-04-141-2/+3
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| * | | duplicated enum item names should result in an errorJeff Wang2020-04-071-2/+3
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* | | Merge pull request #1568 from YosysHQ/eddie/fix_zinitEddie Hung2020-04-132-17/+90
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| * | zinit: resolve one more comment by @mwkmwkmwkEddie Hung2020-04-132-4/+13
| * | zinit: fix review comments from @mwkmwkmwkEddie Hung2020-04-132-9/+37
| * | tests: zinit on $adffEddie Hung2020-04-131-19/+18
| * | zinit: operate on $adff, erase (* init *) entries on consumptionEddie Hung2020-04-131-22/+20
| * | Fix S/R comment; thanks @mwkmwkmwkEddie Hung2020-04-131-1/+1
| * | zinit to transform set/reset value of $_DFF_[NP][NP][01]_Eddie Hung2020-04-131-0/+14
| * | Add testcase for $_DFF_[NP][NP][01]_Eddie Hung2020-04-131-0/+24
| * | Supress error for unhandled \init if whole module selectedEddie Hung2020-04-131-3/+4
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* | opt_expr: Optimize multiplications with low 0 bits in operands.Marcelina Kościelnicka2020-04-132-0/+61
* | Merge pull request #1910 from boqwxp/cleanup_ilang_parserwhitequark2020-04-131-4/+4
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| * | Clean up pseudo-private member usage in `frontends/ilang/ilang_parser.y`.Alberto Gonzalez2020-04-131-4/+4
* | | Add .gitignore to tests/select/Xiretza2020-04-121-0/+1
* | | Merge pull request #1907 from YosysHQ/dave/fix-1906David Shah2020-04-121-1/+0
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| * | | verilog: Fix write to deleted objectDavid Shah2020-04-121-1/+0
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* | | Merge pull request #1603 from whitequark/ice40-ram_stylewhitequark2020-04-1012-50/+836
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| * | | ecp5: do not map FFRAM if explicitly requested otherwise.whitequark2020-04-032-17/+65
| * | | ice40: do not map FFRAM if explicitly requested otherwise.whitequark2020-04-032-9/+31
| * | | memory_map: add -attr option, to respect inference attributes.whitequark2020-04-031-6/+113
| * | | ecp5: add support for both 1364.1 and LSE RAM/ROM attributes.whitequark2020-02-065-5/+376
| * | | ice40: match memory inference attribute values case insensitive.whitequark2020-02-062-0/+7
| * | | memory_bram: add `attr_icase` option.whitequark2020-02-061-7/+35
| * | | ice40: add support for both 1364.1 and LSE RAM/ROM attributes.whitequark2020-02-064-20/+238
| * | | ice40: remove impossible test.whitequark2020-02-061-15/+0
* | | | Merge pull request #1893 from mmicko/program_prefixMiodrag Milanović2020-04-1010-65/+75
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| * | | Keep libyosys name same as befire, but put it in directoryMiodrag Milanovic2020-04-101-11/+11
| * | | Support custom PROGRAM_PREFIXMiodrag Milanovic2020-04-1010-71/+81
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* | | Merge pull request #1562 from whitequark/write_cxxrtlwhitequark2020-04-106-0/+2834
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| * | | write_cxxrtl: add basic documentation.whitequark2020-04-091-1/+16
| * | | write_cxxrtl: add support for $dlatch and $dlatchsr cells.whitequark2020-04-091-3/+16
| * | | write_cxxrtl: add support for $sr cell.whitequark2020-04-091-27/+35
| * | | write_cxxrtl: add support for $slice and $concat cells.whitequark2020-04-091-1/+16
| * | | write_cxxrtl: improve writable memory handling.whitequark2020-04-092-65/+87
| * | | write_cxxrtl: add support for hierarchical designs.whitequark2020-04-091-18/+107
| * | | write_cxxrtl: avoid undefined behavior on out-of-bounds memory access.whitequark2020-04-092-46/+78
| * | | write_cxxrtl: statically schedule comb logic and localize wires.whitequark2020-04-092-68/+368
| * | | write_cxxrtl: elide wires for results of comb cells used once.whitequark2020-04-091-35/+359
| * | | write_cxxrtl: new backend.whitequark2020-04-096-0/+2016
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