aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* Remove abc_flop attributes for nowEddie Hung2019-06-061-56/+10
|
* Merge remote-tracking branch 'origin/eddie/muxpack' into xc7muxEddie Hung2019-06-063-10/+55
|\
| * Fix and test for balanced caseEddie Hung2019-06-063-10/+55
| |
* | Merge remote-tracking branch 'origin/eddie/muxpack' into xc7muxEddie Hung2019-06-0623-12/+819
|\|
| * Fix warningsEddie Hung2019-06-062-3/+3
| |
| * Support cascading $pmux.A with $mux.A and $mux.BEddie Hung2019-06-063-17/+65
| |
| * More cleanupEddie Hung2019-06-061-15/+20
| |
| * Fix spacingEddie Hung2019-06-061-6/+5
| |
| * Non chain user check using next_sigEddie Hung2019-06-061-7/+5
| |
| * Add non exclusive testEddie Hung2019-06-062-0/+56
| |
| * Move muxpack from passes/techmap to passes/optEddie Hung2019-06-063-1/+1
| |
| * Update docEddie Hung2019-06-061-4/+5
| |
| * Add to CHANGELOGEddie Hung2019-06-061-0/+1
| |
| * One more and tidy upEddie Hung2019-06-062-6/+28
| |
| * Add a few more special case testsEddie Hung2019-06-062-0/+51
| |
| * Add tests, fix for !=Eddie Hung2019-06-063-9/+110
| |
| * Missing fileEddie Hung2019-06-061-0/+232
| |
| * Initial adaptation of muxpack from shregmapEddie Hung2019-06-061-0/+1
| |
| * Merge pull request #1060 from antmicro/parsing_attr_on_port_connClifford Wolf2019-06-0614-10/+279
| |\ | | | | | | Added support for parsing attributes on port connections.
| | * Fixed memory leak.Maciej Kurc2019-06-051-0/+4
| | | | | | | | | | | | Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
| | * Moved tests that fail with Icarus Verilog to /tests/various. Those tests are ↵Maciej Kurc2019-06-044-0/+46
| | | | | | | | | | | | | | | | | | just for parsing Verilog. Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
| | * Added tests for attributesMaciej Kurc2019-06-039-0/+219
| | | | | | | | | | | | Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
| | * Added support for parsing attributes on port connections.Maciej Kurc2019-05-311-10/+10
| | | | | | | | | | | | Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
| * | Merge pull request #1073 from whitequark/ecp5-diamond-iobDavid Shah2019-06-061-0/+15
| |\ \ | | | | | | | | ECP5: implement most Diamond I/O buffer primitives
| | * | ECP5: implement all Diamond I/O buffer primitives.whitequark2019-06-061-0/+15
| | | |
| * | | Merge pull request #1071 from YosysHQ/eddie/fix_1070Clifford Wolf2019-06-061-2/+2
| |\ \ \ | | | | | | | | | | Fix typo in opt_rmdff causing register to be incorrectly removed
| | * | | Fix typo in opt_rmdffEddie Hung2019-06-051-2/+2
| | | | |
| * | | | Merge pull request #1072 from YosysHQ/eddie/fix_1069Clifford Wolf2019-06-061-0/+5
| |\ \ \ \ | | | | | | | | | | | | Error out if no top module given before 'sim'
| | * | | | Error out if no top module given before 'sim'Eddie Hung2019-06-051-0/+5
| | |/ / /
| * / / / Missing doc for -tech xilinx in shregmapEddie Hung2019-06-051-0/+3
| |/ / /
| * | | Merge pull request #1067 from YosysHQ/clifford/fix1065Eddie Hung2019-06-051-1/+1
| |\ \ \ | | | | | | | | | | Suppress driver-driver conflict warning for unknown cell types
* | | | | shregmap -tech xilinx_static to handle INITEddie Hung2019-06-051-22/+32
| | | | |
* | | | | Continue support for ShregmapTechXilinx7StaticEddie Hung2019-06-051-30/+81
| | | | |
* | | | | Update abc attributes on FD*E_1Eddie Hung2019-06-051-6/+26
| | | | |
* | | | | CleanupEddie Hung2019-06-052-17/+0
| | | | |
* | | | | Call shregmap -tech xilinx_staticEddie Hung2019-06-051-1/+1
| | | | |
* | | | | Revert "Move ff_map back after ABC for shregmap"Eddie Hung2019-06-051-4/+4
| | | | | | | | | | | | | | | | | | | | This reverts commit 9b9bd4e19f3da363eb3c90ef27ace282716d2e06.
* | | | | Add -tech xilinx_staticEddie Hung2019-06-051-2/+13
| | | | |
* | | | | Refactor to ShregmapTechXilinx7StaticEddie Hung2019-06-051-46/+86
| | | | |
* | | | | shregmap -tech xilinx_dynamic to work -params and -enpolEddie Hung2019-06-051-6/+26
| | | | |
* | | | | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-06-053-28/+95
|\| | | |
| * | | | Merge pull request #1066 from YosysHQ/clifford/fix1056Clifford Wolf2019-06-051-1/+0
| |\ \ \ \ | | | | | | | | | | | | Remove yosys_banner() from python wrapper init
| | * | | | Remove yosys_banner() from python wrapper init, fixes #1056Clifford Wolf2019-06-051-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | Major rewrite of wire selection in setundef -initClifford Wolf2019-06-051-30/+89
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | Indent fixClifford Wolf2019-06-051-23/+25
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | Merge pull request #999 from jakobwenzel/setundefInitFixClifford Wolf2019-06-051-16/+23
| |\ \ \ \ \ | | | | | | | | | | | | | | initialize more registers in setundef -init
| | * | | | | initialize more registers in setundef -initJakob Wenzel2019-05-091-16/+23
| | | | | | |
| * | | | | | Fix typo in fmcombine log message, fixes #1063Clifford Wolf2019-06-051-2/+2
| | |/ / / / | |/| | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | Merge remote-tracking branch 'origin/clifford/fix1065' into xc7muxEddie Hung2019-06-052-2/+2
|\ \ \ \ \ \ | | |_|/ / / | |/| | | |
| * | | | | Suppress driver-driver conflict warning for unknown cell types, fixes #1065Clifford Wolf2019-06-051-1/+1
| |/ / / / | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
generated by cgit v1.2.3 (git 2.25.1) at 2025-03-23 09:53:56 +0000