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| author | Jakob Wenzel <wenzel@rs.tu-darmstadt.de> | 2019-05-09 12:37:31 +0200 |
|---|---|---|
| committer | Jakob Wenzel <wenzel@rs.tu-darmstadt.de> | 2019-05-09 12:47:16 +0200 |
| commit | f06cb75b930d6ef5d8f4f12825ce0ef8f296ce17 (patch) | |
| tree | 02a20715647492ad45272c460dc75771f149528d | |
| parent | caad497839d0d3aa91b02ce970968ad4e2c1ad88 (diff) | |
| download | yosys-f06cb75b930d6ef5d8f4f12825ce0ef8f296ce17.tar.gz yosys-f06cb75b930d6ef5d8f4f12825ce0ef8f296ce17.tar.bz2 yosys-f06cb75b930d6ef5d8f4f12825ce0ef8f296ce17.zip | |
initialize more registers in setundef -init
| -rw-r--r-- | passes/cmds/setundef.cc | 39 |
1 files changed, 23 insertions, 16 deletions
diff --git a/passes/cmds/setundef.cc b/passes/cmds/setundef.cc index f6949c820..5b43d528c 100644 --- a/passes/cmds/setundef.cc +++ b/passes/cmds/setundef.cc @@ -404,22 +404,29 @@ struct SetundefPass : public Pass { initwires.insert(wire); } - for (int wire_types = 0; wire_types < 2; wire_types++) - for (auto wire : module->wires()) - { - if (wire->name[0] == (wire_types ? '\\' : '$')) - next_wire: - continue; - - for (auto bit : sigmap(wire)) - if (!ffbits.count(bit)) - goto next_wire; - - for (auto bit : sigmap(wire)) - ffbits.erase(bit); - - initwires.insert(wire); - } + for (int wire_types = 0; wire_types < 2; wire_types++) { + pool<SigBit> ffbitsToErase; + for (auto wire : module->wires()) { + if (wire->name[0] == (wire_types ? '\\' : '$')) { + next_wire: + continue; + } + + for (auto bit : sigmap(wire)) + if (!ffbits.count(bit)) { + goto next_wire; + } + + for (auto bit : sigmap(wire)) { + ffbitsToErase.insert(bit); + } + + initwires.insert(wire); + } + for (const auto &bit : ffbitsToErase) { + ffbits.erase(bit); + } + } for (auto wire : initwires) { |