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| | * | | sat: Add -set-def-formal option to force defined $any* outputs | Jannis Harder | 2022-11-28 | 3 | -10/+46 | |
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| * | | Bump version | github-actions[bot] | 2022-11-26 | 1 | -1/+1 | |
| * | | Merge pull request #3561 from YosysHQ/tcl_shell | Miodrag Milanović | 2022-11-25 | 2 | -8/+34 | |
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| | * | | Add TCL interactive shell mode | Miodrag Milanovic | 2022-11-25 | 2 | -8/+34 | |
| * | | | Merge pull request #3560 from YosysHQ/verific_conf | Miodrag Milanović | 2022-11-25 | 3 | -8/+43 | |
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| | * | | update documentation | Miodrag Milanovic | 2022-11-25 | 1 | -3/+3 | |
| | * | | Support importing verilog configurations using Verific | Miodrag Milanovic | 2022-11-25 | 3 | -5/+40 | |
| * | | | Bump version | github-actions[bot] | 2022-11-25 | 1 | -1/+1 | |
| * | | | Remove docs dependency on yosys repo (#3558) | KrystalDelusion | 2022-11-24 | 39 | -18/+905 | |
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| * | | Merge pull request #3552 from daglem/fix-sv-c-array-dimensions | Jannis Harder | 2022-11-23 | 1 | -3/+3 | |
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| | * | | Correct interpretation of SystemVerilog C-style array dimensions | Dag Lem | 2022-11-13 | 1 | -3/+3 | |
| * | | | Bump version | github-actions[bot] | 2022-11-22 | 1 | -1/+1 | |
| * | | | Merge branch 'zachjs-master' | Jannis Harder | 2022-11-21 | 3 | -0/+52 | |
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| | * | | | verilog: Support module-scoped task/function calls | Zachary Snow | 2022-10-29 | 3 | -0/+52 | |
| * | | | | mention prerequisites in fsm_detect and fsm help | N. Engelhardt | 2022-11-21 | 2 | -0/+18 | |
| * | | | | Bump version | github-actions[bot] | 2022-11-18 | 1 | -1/+1 | |
| * | | | | fabulous: Allow adding extra custom prims and map rules | gatecat | 2022-11-17 | 4 | -0/+53 | |
| * | | | | fabulous: improvements to the pass | gatecat | 2022-11-17 | 13 | -139/+340 | |
| * | | | | fabulous: Unify and update primitives | gatecat | 2022-11-17 | 3 | -852/+356 | |
| * | | | | Introduce RegFile mappings | TaoBi22 | 2022-11-17 | 4 | -2/+95 | |
| * | | | | Replace synth call with components, reintroduce flags and correct vpr flag im... | TaoBi22 | 2022-11-17 | 1 | -4/+76 | |
| * | | | | Reorder operations to load in primitive library before hierarchy pass | TaoBi22 | 2022-11-17 | 1 | -5/+6 | |
| * | | | | Add plib flag to specify custom primitive library path | TaoBi22 | 2022-11-17 | 1 | -2/+14 | |
| * | | | | Remove flattening from FABulous pass | TaoBi22 | 2022-11-17 | 1 | -11/+2 | |
| * | | | | Remove ALL currently unused flags (some to be reintroduced later and passed t... | TaoBi22 | 2022-11-17 | 1 | -82/+3 | |
| * | | | | Add synth_fabulous ScriptPass | TaoBi22 | 2022-11-17 | 8 | -0/+1282 | |
| * | | | | Bump version | github-actions[bot] | 2022-11-17 | 1 | -1/+1 | |
| * | | | | Slowing down clock to have same metadata | Miodrag Milanovic | 2022-11-16 | 1 | -2/+2 | |
| * | | | | Bump version | github-actions[bot] | 2022-11-16 | 1 | -1/+1 | |
| * | | | | faketime to make PDFs unique | Miodrag Milanovic | 2022-11-15 | 1 | -2/+2 | |
| * | | | | Rst docs conversion (#3496) | KrystalDelusion | 2022-11-15 | 57 | -2/+7792 | |
| * | | | | Merge pull request #3547 from YosysHQ/update_abc | Miodrag Milanović | 2022-11-14 | 1 | -1/+1 | |
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| | * | | | Update ABC | Miodrag Milanovic | 2022-11-09 | 1 | -1/+1 | |
| * | | | | Bump version | github-actions[bot] | 2022-11-10 | 1 | -1/+1 | |
| * | | | | Add missing memory width assert preventing division by zero (#3546) | Emil J | 2022-11-09 | 1 | -0/+1 | |
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| * | | | Bump version | github-actions[bot] | 2022-11-09 | 1 | -1/+1 | |
| * | | | Next dev cycle | Miodrag Milanovic | 2022-11-08 | 2 | -2/+5 | |
| * | | | Release version 0.23 | Miodrag Milanovic | 2022-11-08 | 2 | -3/+3 | |
| * | | | Update manual | Miodrag Milanovic | 2022-11-08 | 1 | -0/+47 | |
| * | | | Bump version | github-actions[bot] | 2022-11-08 | 1 | -1/+1 | |
| * | | | Merge pull request #3544 from jix/cosim-ffinit | Jannis Harder | 2022-11-07 | 1 | -12/+11 | |
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| | * | | | sim: Run a comb-only update step to set past values during FST cosim | Jannis Harder | 2022-11-07 | 1 | -12/+11 | |
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| * | | | Update CHANGELOG | Miodrag Milanovic | 2022-11-07 | 1 | -1/+5 | |
| * | | | Merge pull request #3536 from YosysHQ/claire/vcdend | Miodrag Milanović | 2022-11-07 | 1 | -0/+1 | |
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| | * | | | Add extra time at the end of a sat VCD trace | Claire Xenia Wolf | 2022-11-01 | 1 | -0/+1 | |
| * | | | | Merge pull request #3543 from jix/fstdata-fixes | Miodrag Milanović | 2022-11-07 | 1 | -8/+20 | |
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| | * | | | | fstdata: Update past_data before end_time callback | Jannis Harder | 2022-11-07 | 1 | -0/+1 | |
| | * | | | | fstdata: Handle square/angle bracket replacemnt, change memory handling | Jannis Harder | 2022-11-07 | 1 | -8/+19 | |
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| * | | | | Update CHANGELOG | Miodrag Milanovic | 2022-11-07 | 1 | -0/+11 | |
| * | | | | Bump version | github-actions[bot] | 2022-11-05 | 1 | -1/+1 | |
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