Commit message (Expand) | Author | Age | Files | Lines | |
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* | Update verific command file documentation | Miodrag Milanovic | 2022-05-23 | 1 | -17/+19 |
* | Use analysis mode if set in file | Miodrag Milanovic | 2022-05-23 | 1 | -2/+2 |
* | Merge pull request #3331 from YosysHQ/git_rev_fix | Miodrag Milanović | 2022-05-23 | 1 | -1/+1 |
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| * | Change way to get commit sha | Jannis Harder | 2022-05-23 | 1 | -1/+1 |
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* | abc9_ops: Don't leave unused derived modules lying around | gatecat | 2022-05-23 | 1 | -0/+9 |
* | Bump version | github-actions[bot] | 2022-05-21 | 1 | -1/+1 |
* | Merge pull request #3324 from jix/confusing-select-errors | Jannis Harder | 2022-05-20 | 1 | -8/+10 |
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| * | select: Fix -assert-none and -assert-any error output and docs | Jannis Harder | 2022-05-19 | 1 | -8/+10 |
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* | Bump version | github-actions[bot] | 2022-05-19 | 1 | -1/+1 |
* | Add memory_bmux2rom pass. | Marcelina Kościelnicka | 2022-05-18 | 4 | -1/+124 |
* | Add memory_libmap tests. | Marcelina Kościelnicka | 2022-05-18 | 22 | -0/+1500 |
* | gatemate: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 3 | -781/+927 |
* | machxo2: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 7 | -1/+578 |
* | efinix: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 4 | -102/+164 |
* | anlogic: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 9 | -303/+585 |
* | ice40: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 9 | -514/+293 |
* | xilinx: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 40 | -2315/+4540 |
* | gowin: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 9 | -266/+576 |
* | nexus: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 11 | -519/+679 |
* | ecp5: Use `memory_libmap` pass. | Marcelina Kościelnicka | 2022-05-18 | 10 | -601/+602 |
* | Add memory_libmap pass. | Marcelina Kościelnicka | 2022-05-18 | 6 | -0/+3884 |
* | proc_rom: Add special handling of const-0 address bits. | Marcelina Kościelnicka | 2022-05-18 | 2 | -15/+186 |
* | Bump version | github-actions[bot] | 2022-05-18 | 1 | -1/+1 |
* | Merge pull request #3310 from robinsonb5-PRs/master | Miodrag Milanović | 2022-05-17 | 1 | -0/+2 |
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| * | Use log_warning when Tcl_Init fails, report error with Tcl_ErrnoMsg. | Alastair M. Robinson | 2022-05-16 | 1 | -1/+1 |
| * | Now calls Tcl_Init after creating the interp, fixes clock format. | Alastair M. Robinson | 2022-05-10 | 1 | -0/+2 |
* | | opt_ffinv: Use ModIndex instead of ModWalker. | Marcelina Kościelnicka | 2022-05-17 | 1 | -50/+53 |
* | | Merge pull request #3314 from jix/sva_value_change_logic_wide | Jannis Harder | 2022-05-16 | 3 | -9/+72 |
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| * | | verific: Use new value change logic also for $stable of wide signals. | Jannis Harder | 2022-05-11 | 3 | -9/+72 |
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* | | Bump version | github-actions[bot] | 2022-05-14 | 1 | -1/+1 |
* | | Add opt_ffinv pass. | Marcelina Kościelnicka | 2022-05-13 | 4 | -3/+268 |
* | | Bump version | github-actions[bot] | 2022-05-13 | 1 | -1/+1 |
* | | Add proc_rom pass. | Marcelina Kościelnicka | 2022-05-13 | 5 | -1/+283 |
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* | Bump version | github-actions[bot] | 2022-05-10 | 1 | -1/+1 |
* | Merge pull request #3305 from jix/sva_value_change_logic | Jannis Harder | 2022-05-09 | 8 | -11/+121 |
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| * | verific: Improve logic generated for SVA value change expressions | Jannis Harder | 2022-05-09 | 8 | -11/+121 |
* | | Merge pull request #3297 from jix/sva_nested_clk_else | Jannis Harder | 2022-05-09 | 4 | -5/+27 |
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| * | | verific: Fix conditions of SVAs with explicit clocks within procedures | Jannis Harder | 2022-05-03 | 4 | -5/+27 |
* | | | Next dev cycle | Miodrag Milanovic | 2022-05-09 | 2 | -2/+5 |
* | | | Release version 0.17 | Miodrag Milanovic | 2022-05-09 | 2 | -3/+3 |
* | | | Update CHANGELOG | Miodrag Milanovic | 2022-05-09 | 1 | -0/+3 |
* | | | Update manual | Miodrag Milanovic | 2022-05-09 | 1 | -0/+44 |
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* | | Merge pull request #3299 from YosysHQ/mmicko/sim_memory | Miodrag Milanović | 2022-05-09 | 4 | -3/+59 |
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| * | | Handle possible non-memory indexed data | Miodrag Milanovic | 2022-05-06 | 1 | -8/+10 |
| * | | map memory location to wire value, if memory is converted to FFs | Miodrag Milanovic | 2022-05-04 | 1 | -0/+4 |
| * | | fix crash when no fst input | Miodrag Milanovic | 2022-05-04 | 1 | -1/+2 |
| * | | Start restoring memory state from VCD/FST | Miodrag Milanovic | 2022-05-04 | 3 | -3/+50 |
| * | | Add propagated clock signals into btor info file | Claire Xenia Wolf | 2022-05-04 | 1 | -0/+2 |
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* | | Fix running sva tests | Miodrag Milanovic | 2022-05-09 | 1 | -4/+3 |
* | | Bump version | github-actions[bot] | 2022-05-08 | 1 | -1/+1 |