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* abc9: Add wire delays to synth_ice40David Shah2019-06-261-2/+10
* Missing muxpack.o in MakefileEddie Hung2019-06-251-0/+1
* Realistic delays for RAM32X1D tooEddie Hung2019-06-251-2/+2
* Add RAM32X1D box infoEddie Hung2019-06-252-4/+12
* Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-06-2513-14/+1029
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| * Add testcase from #335, fixed by #1130Eddie Hung2019-06-251-0/+28
| * Merge pull request #1130 from YosysHQ/eddie/fix710Clifford Wolf2019-06-253-6/+33
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| | * Fix spacingEddie Hung2019-06-251-4/+3
| | * Move only one consumer check outside of while loopEddie Hung2019-06-251-6/+5
| | * Walk through as many muxes as exist for rd_enEddie Hung2019-06-241-8/+16
| | * Add testEddie Hung2019-06-242-1/+22
| * | Merge pull request #1129 from YosysHQ/eddie/ram32x1dEddie Hung2019-06-255-20/+73
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| | * | Add RAM32X1D supportEddie Hung2019-06-245-20/+73
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| * | Merge pull request #1075 from YosysHQ/eddie/muxpackClifford Wolf2019-06-255-0/+897
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| | * | Merge remote-tracking branch 'origin/master' into eddie/muxpackEddie Hung2019-06-2215-61/+450
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| | * | Cope with $reduce_or common in caseEddie Hung2019-06-211-5/+37
| | * | Add more testsEddie Hung2019-06-212-21/+51
| | * | Fix testcaseEddie Hung2019-06-211-3/+4
| | * | Fix spacingEddie Hung2019-06-211-24/+24
| | * | Add docEddie Hung2019-06-211-3/+3
| | * | Add more muxpack tests, with overlapping entriesEddie Hung2019-06-212-1/+84
| | * | Fix up ExclusiveDatabase with @cliffordwolf's helpEddie Hung2019-06-211-35/+34
| | * | Merge branch 'master' into eddie/muxpackEddie Hung2019-06-2129-47/+237
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| | * \ \ Merge remote-tracking branch 'origin/master' into eddie/muxpackEddie Hung2019-06-185-3/+61
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| | * | | | Elaborate muxpack docEddie Hung2019-06-101-2/+6
| | * | | | Merge remote-tracking branch 'origin/master' into eddie/muxpackEddie Hung2019-06-103-13/+72
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| | * \ \ \ \ Merge branch 'master' into eddie/muxpackEddie Hung2019-06-0739-364/+573
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| | * | | | | | Comment O(N) -> O(N^2)Eddie Hung2019-06-071-1/+1
| | * | | | | | Add nonexcl case test, comment out two othersEddie Hung2019-06-072-22/+57
| | * | | | | | Extend ExclusiveDatabase to query SigSpec-s (for $pmux)Eddie Hung2019-06-071-19/+27
| | * | | | | | Add ExclusiveDatabase to check exclusive $eq/$logic_not cell resultsEddie Hung2019-06-071-1/+64
| | * | | | | | Add @cliffordwolf freduce testcaseEddie Hung2019-06-072-0/+30
| | * | | | | | Add nonexclusive test from @cliffordwolfEddie Hung2019-06-072-0/+28
| | * | | | | | Resolve @cliffordwolf comment on redundant checkEddie Hung2019-06-071-10/+2
| | * | | | | | Resolve @cliffordwolf comment on sigmapEddie Hung2019-06-071-2/+2
| | * | | | | | Another muxpack testEddie Hung2019-06-072-0/+32
* | | | | | | | nullptr checkEddie Hung2019-06-251-0/+1
* | | | | | | | Use LUT delays for dist RAM delaysEddie Hung2019-06-241-4/+4
* | | | | | | | Fix for abc_scc_break is busEddie Hung2019-06-241-21/+23
* | | | | | | | More meaningful error messageEddie Hung2019-06-241-0/+2
* | | | | | | | Re-enable dist RAM boxes for ECP5Eddie Hung2019-06-241-1/+1
* | | | | | | | Revert "Re-enable dist RAM boxes for ECP5"Eddie Hung2019-06-241-1/+1
* | | | | | | | Do not use log_id as it strips \\, also fix scc for |wire| > 1Eddie Hung2019-06-241-13/+30
* | | | | | | | Re-enable dist RAM boxes for ECP5Eddie Hung2019-06-241-1/+1
* | | | | | | | Add Xilinx dist RAM as comb boxesEddie Hung2019-06-242-0/+16
* | | | | | | | Fix abc9's scc breaker, also break on abc_scc_break attrEddie Hung2019-06-241-9/+31
* | | | | | | | Add tests/various/abc9.{v,ys} with SCC testEddie Hung2019-06-242-0/+19
* | | | | | | | Merge remote-tracking branch 'origin/master' into xaigEddie Hung2019-06-242-0/+16
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| * | | | | | | Merge pull request #1124 from mmicko/json_portsClifford Wolf2019-06-242-0/+16
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| | * | | | | | Fix json formattingMiodrag Milanovic2019-06-211-1/+1