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* Added recommended apt-get commands to READMEClifford Wolf2013-10-111-2/+20
* Fixed minisat includeClifford Wolf2013-10-111-1/+1
* Pinned ABC revision to 0f9e5488ced3Clifford Wolf2013-10-031-1/+3
* Improvements in EDIF backendClifford Wolf2013-09-172-2/+41
* Added additional options to BLIF backendClifford Wolf2013-09-151-15/+60
* Added BLIF backendClifford Wolf2013-09-152-0/+245
* A couple of small fixes in SPICE backendClifford Wolf2013-09-151-6/+18
* Moved common techlib files to techlibs/commonClifford Wolf2013-09-1513-17/+17
* Updated manualClifford Wolf2013-09-153-21/+173
* Added spice testbench to techlibs/cmosClifford Wolf2013-09-145-6/+73
* Added spice backendClifford Wolf2013-09-146-0/+306
* Merge branch 'master' of github.com:cliffordwolf/yosysClifford Wolf2013-09-032-10/+41
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| * Encode large (>32 bits) parameters as hex string in edif backendClifford Wolf2013-08-281-3/+16
| * Improved edif backendClifford Wolf2013-08-271-8/+18
| * Added mapping to techlibs/xilinx7 testbench (exposes EDIF backend todos)Clifford Wolf2013-08-271-2/+10
* | Added -selected option to various backendsClifford Wolf2013-09-033-9/+58
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* Added simple xilinx7 technology mapping filesClifford Wolf2013-08-224-0/+167
* More explicit integer output in verilog backendClifford Wolf2013-08-221-2/+2
* Added correct encoding of identifiers in EDIF backendClifford Wolf2013-08-221-13/+61
* Added edif backend (still under construction)Clifford Wolf2013-08-222-0/+202
* Merge pull request #10 from hansiglaser/masterClifford Wolf2013-08-211-0/+2
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| * fixed Verilog parser filename and line numbering issue with include filesJohann Glaser2013-08-211-0/+2
* | Some minor documentation fixesClifford Wolf2013-08-212-2/+2
* | Merge pull request #9 from hansiglaser/masterClifford Wolf2013-08-203-4/+24
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| * Added support for include directories with the new '-I' argument of theJohann Glaser2013-08-203-4/+24
* | Merge pull request #8 from hansiglaser/masterClifford Wolf2013-08-202-4/+8
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| * Added support for notif0/notif1 primitivesJohann Glaser2013-08-202-4/+8
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* Added cleaning of old version_* files to version_* make ruleClifford Wolf2013-08-201-1/+2
* Added version info to yosys command and added -V optionClifford Wolf2013-08-203-2/+22
* Minor fixes in abc build instructions and abc passClifford Wolf2013-08-202-5/+5
* Fixed width and sign detection for ** operatorClifford Wolf2013-08-191-3/+3
* Added support for bufif0/bufif1 primitivesClifford Wolf2013-08-192-33/+59
* Improved ast dumping (ast/verilog frontend)Clifford Wolf2013-08-194-64/+35
* Implemented same div-by-zero behavior as found in other synthesis toolsClifford Wolf2013-08-152-7/+59
* Fixed signed div/mod in const eval (rounding and stuff)Clifford Wolf2013-08-151-2/+8
* Added ezsat api for creation of anonymous vectorsClifford Wolf2013-08-152-0/+9
* Added sat -ignore_div_by_zero switchClifford Wolf2013-08-152-2/+17
* Added eval -brute_force_equiv_checker_x modeClifford Wolf2013-08-152-9/+25
* Added support for "2**n" shifter encodingClifford Wolf2013-08-122-24/+33
* Added SAT support for $div and $mod cellsClifford Wolf2013-08-113-0/+55
* Added "clean -purge" and ";;;" supportClifford Wolf2013-08-112-4/+21
* Added ";;" as shortcut for "; clean;"Clifford Wolf2013-08-112-1/+7
* freduce performance fixClifford Wolf2013-08-101-4/+8
* Added $div and $mod technology mappingClifford Wolf2013-08-094-34/+137
* Added techmap -opt modeClifford Wolf2013-08-092-9/+44
* Some fixes to improve determinismClifford Wolf2013-08-095-32/+41
* Sort ctrl signals in fsm_extractClifford Wolf2013-08-081-0/+3
* Added -try option to freduce passClifford Wolf2013-08-081-16/+44
* Added "clean" command (less verbose opt_clean)Clifford Wolf2013-08-081-9/+52
* Fixed topological ordering in freduce passClifford Wolf2013-08-071-54/+67
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