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author | Clifford Wolf <clifford@clifford.at> | 2013-10-31 12:27:35 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2013-10-31 12:27:35 +0100 |
commit | 0b4a64ac6adbd6c61e09517c4ea98cabd8b8b9ad (patch) | |
tree | b2ed5e7cff20f6a2e22ff64de57b36dbba82e693 | |
parent | 0efe16f118e20e30b5fce152cf668a0929a08439 (diff) | |
download | yosys-0b4a64ac6adbd6c61e09517c4ea98cabd8b8b9ad.tar.gz yosys-0b4a64ac6adbd6c61e09517c4ea98cabd8b8b9ad.tar.bz2 yosys-0b4a64ac6adbd6c61e09517c4ea98cabd8b8b9ad.zip |
Added DFFSR cell to techlibs/cmos/cmos_cells.lib
-rw-r--r-- | techlibs/cmos/cmos_cells.lib | 14 | ||||
-rw-r--r-- | techlibs/cmos/cmos_cells.v | 12 |
2 files changed, 26 insertions, 0 deletions
diff --git a/techlibs/cmos/cmos_cells.lib b/techlibs/cmos/cmos_cells.lib index 1d7b8279c..164256c01 100644 --- a/techlibs/cmos/cmos_cells.lib +++ b/techlibs/cmos/cmos_cells.lib @@ -29,4 +29,18 @@ library(demo) { pin(Q) { direction: output; function: "IQ"; } } + cell(DFFSR) { + area: 18; + ff(IQ, IQN) { clocked_on: C; + next_state: D; + preset: S; + clear: R; } + pin(C) { direction: input; + clock: true; } + pin(D) { direction: input; } + pin(Q) { direction: output; + function: "IQ"; } + pin(S) { direction: input; } + pin(R) { direction: input; } + } } diff --git a/techlibs/cmos/cmos_cells.v b/techlibs/cmos/cmos_cells.v index 802f58718..da75270cb 100644 --- a/techlibs/cmos/cmos_cells.v +++ b/techlibs/cmos/cmos_cells.v @@ -21,3 +21,15 @@ always @(posedge C) Q <= D; endmodule +module DFFSR(C, D, Q, S, R); +input C, D, S, R; +output reg Q; +always @(posedge C, posedge S, posedge R) + if (S) + Q <= 1'b1; + else if (R) + Q <= 1'b0; + else + Q <= D; +endmodule + |