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| * | | | | | | Support more than one port in the abc_scc_break attrEddie Hung2019-06-261-38/+42
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| * | | | | | | Add write_xaiger into CHANGELOGEddie Hung2019-06-261-0/+1
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| * | | | | | | Merge branch 'koriakin/xc7nocarrymux' into xaigEddie Hung2019-06-260-0/+0
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| | * | | | | | GrrrEddie Hung2019-06-261-2/+2
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* | | | | | | | synth_xilinx's muxcover call to be very conservative -- -nodecodeEddie Hung2019-06-261-1/+1
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* | | | | | | | Accidentally removed "simplemap $mux"Eddie Hung2019-06-261-0/+1
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* | | | | | | | Replace with <internal options>Eddie Hung2019-06-261-2/+2
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* | | | | | | | Rework help_mode for synth_xilinx -widemuxEddie Hung2019-06-261-22/+23
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* | | | | | | | Merge remote-tracking branch 'origin/eddie/fix1132' into xc7muxEddie Hung2019-06-261-12/+11
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| * | | | | | | | Emprically (even if I don't fully understand it) this passes picorv32 tbEddie Hung2019-06-261-12/+11
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* | | | | | | | | Merge remote-tracking branch 'origin/eddie/fix1132' into xc7muxEddie Hung2019-06-261-1/+1
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| * | | | | | | | Remove redundant check (done further down)Eddie Hung2019-06-261-1/+1
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* | | | | | | | | Return to upstream synth_xilinx with opt -full and wreduceEddie Hung2019-06-261-19/+3
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* | | | | | | | | Merge remote-tracking branch 'origin/eddie/fix1132' into xc7muxEddie Hung2019-06-261-1/+1
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| * | | | | | | | Restore sigmap wrapperEddie Hung2019-06-261-1/+1
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* | | | | | | | | Merge remote-tracking branch 'origin/eddie/fix1132' into xc7muxEddie Hung2019-06-262-55/+210
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| * | | | | | | | Add more testsEddie Hung2019-06-261-0/+152
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| * | | | | | | | muxcover to be undef-sensitive when computing decodersEddie Hung2019-06-261-21/+40
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| * | | | | | | | Revert "Rework muxcover decoder gen if more significant muxes are 1'bx"Eddie Hung2019-06-261-55/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit b2b5cf78e21def63c54c080217d77afefba8e4c7.
| * | | | | | | | Let's not go crazy: use nonzero costsEddie Hung2019-06-261-6/+6
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* | | | | | | | | Merge remote-tracking branch 'origin/eddie/fix1132' into xc7muxEddie Hung2019-06-269-91/+350
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| * | | | | | | | Rework muxcover decoder gen if more significant muxes are 1'bxEddie Hung2019-06-261-39/+55
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| * | | | | | | | Add testsEddie Hung2019-06-261-0/+168
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| * | | | | | | Merge pull request #1137 from mmicko/cell_sim_fixClifford Wolf2019-06-262-14/+1
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | Simulation model verilog fix
| | * | | | | | | Simulation model verilog fixMiodrag Milanovic2019-06-262-14/+1
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| * | | | | | | Improve opt_clean handling of unused public wiresClifford Wolf2019-06-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | Improve BTOR2 handling of undriven wiresClifford Wolf2019-06-261-3/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | Fix segfault on failed VERILOG_FRONTEND::const2ast, closes #1131Clifford Wolf2019-06-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | Do not clean up buffer cells with "keep" attribute, closes #1128Clifford Wolf2019-06-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | Escape scope names starting with dollar sign in smtio.pyClifford Wolf2019-06-261-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | Add more ECP5 Diamond flip-flops.whitequark2019-06-262-30/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This includes all I/O registers, and a few more regular FFs where it was convenient.
* | | | | | | | Instead of blocking wreduce on $mux, use -keepdc instead #1132Eddie Hung2019-06-261-2/+2
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* | | | | | | | Do not call opt with -full before muxcoverEddie Hung2019-06-261-1/+1
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* | | | | | | | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-261-1/+1
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| * | | | | | | Remove unused varEddie Hung2019-06-261-1/+1
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* | | | | | | | Cleanup abc_box_idEddie Hung2019-06-262-10/+10
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* | | | | | | | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-264-19/+67
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| * | | | | | | Add _nowide variants of LUT libraries in -nowidelut flowsEddie Hung2019-06-264-13/+44
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| * | | | | | | Merge branch 'xaig' of github.com:YosysHQ/yosys into xaigEddie Hung2019-06-261-2/+10
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| * \ \ \ \ \ \ \ Merge branch 'koriakin/xc7nocarrymux' into xaigEddie Hung2019-06-260-0/+0
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| | * | | | | | | Fix spacingEddie Hung2019-06-261-5/+5
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| * | | | | | | | Merge branch 'koriakin/xc7nocarrymux' into xaigEddie Hung2019-06-260-0/+0
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| | * | | | | | | Oops. Actually use nocarry flag as spotted by @koriakinEddie Hung2019-06-261-5/+7
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| * | | | | | | | Merge branch 'koriakin/xc7nocarrymux' into xaigEddie Hung2019-06-262-9/+26
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| | * | | | | | | synth_ecp5 rename -nomux to -nowidelut, but preserve formerEddie Hung2019-06-261-6/+6
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| | * | | | | | | Merge branch 'xc7nocarrymux' of https://github.com/koriakin/yosys into ↵Eddie Hung2019-06-261-4/+24
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| | | * | | | | | synth_xilinx: Add -nocarry and -nomux options.Marcin Kościelnicki2019-04-301-7/+26
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* | | | | | | | | Rename -minmuxf to -widemuxEddie Hung2019-06-261-23/+23
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* | | | | | | | | Merge remote-tracking branch 'origin/xaig' into xc7muxEddie Hung2019-06-261-2/+10
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| * | | | | | | | Merge pull request #1136 from YosysHQ/xaig_ice40_wire_delEddie Hung2019-06-261-2/+10
| |\ \ \ \ \ \ \ \ | | |/ / / / / / / | |/| | | | | | | abc9: Add wire delays to synth_ice40