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| author | Clifford Wolf <clifford@clifford.at> | 2019-06-26 11:00:44 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2019-06-26 11:01:03 +0200 |
| commit | 8e9ef891febb47f512710de591401539ad521634 (patch) | |
| tree | 4f465f025220bf6ccc97c7e3cbf63e9b57deb0f4 | |
| parent | b3c36b444808be36a4fb35a3d78ba3f9691b3da0 (diff) | |
| download | yosys-8e9ef891febb47f512710de591401539ad521634.tar.gz yosys-8e9ef891febb47f512710de591401539ad521634.tar.bz2 yosys-8e9ef891febb47f512710de591401539ad521634.zip | |
Do not clean up buffer cells with "keep" attribute, closes #1128
Signed-off-by: Clifford Wolf <clifford@clifford.at>
| -rw-r--r-- | passes/opt/opt_clean.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/opt/opt_clean.cc b/passes/opt/opt_clean.cc index cfb0f788a..5f75288e2 100644 --- a/passes/opt/opt_clean.cc +++ b/passes/opt/opt_clean.cc @@ -480,7 +480,7 @@ void rmunused_module(RTLIL::Module *module, bool purge_mode, bool verbose, bool std::vector<RTLIL::Cell*> delcells; for (auto cell : module->cells()) - if (cell->type.in("$pos", "$_BUF_")) { + if (cell->type.in("$pos", "$_BUF_") && !cell->has_keep_attr()) { bool is_signed = cell->type == "$pos" && cell->getParam("\\A_SIGNED").as_bool(); RTLIL::SigSpec a = cell->getPort("\\A"); RTLIL::SigSpec y = cell->getPort("\\Y"); |