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Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/common/simlib.v | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/techlibs/common/simlib.v b/techlibs/common/simlib.v index 2c4db1ac6..d0abd3b34 100644 --- a/techlibs/common/simlib.v +++ b/techlibs/common/simlib.v @@ -1305,6 +1305,14 @@ endmodule // -------------------------------------------------------- +module \$cover (A, EN); + +input A, EN; + +endmodule + +// -------------------------------------------------------- + module \$initstate (Y); output reg Y = 1; |