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-rw-r--r--CHANGELOG1
-rw-r--r--passes/techmap/muxcover.cc6
2 files changed, 4 insertions, 3 deletions
diff --git a/CHANGELOG b/CHANGELOG
index 839fefcf1..4c38f6e6e 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -17,6 +17,7 @@ Yosys 0.8 .. Yosys 0.8-dev
- Added "rename -src"
- Added "equiv_opt" pass
- Added "read_aiger" frontend
+ - Extended "muxcover -mux{4,8,16}=<cost>"
- "synth_xilinx" to now infer hard shift registers, using new "shregmap -tech xilinx"
diff --git a/passes/techmap/muxcover.cc b/passes/techmap/muxcover.cc
index 32102436d..8e44be148 100644
--- a/passes/techmap/muxcover.cc
+++ b/passes/techmap/muxcover.cc
@@ -610,7 +610,7 @@ struct MuxcoverPass : public Pass {
use_mux4 = true;
if (arg.size() > 5) {
if (arg[5] != '=') break;
- cost_mux4 = atoi(arg.substr(5).c_str());
+ cost_mux4 = atoi(arg.substr(6).c_str());
}
continue;
}
@@ -618,7 +618,7 @@ struct MuxcoverPass : public Pass {
use_mux8 = true;
if (arg.size() > 5) {
if (arg[5] != '=') break;
- cost_mux8 = atoi(arg.substr(5).c_str());
+ cost_mux8 = atoi(arg.substr(6).c_str());
}
continue;
}
@@ -626,7 +626,7 @@ struct MuxcoverPass : public Pass {
use_mux16 = true;
if (arg.size() > 6) {
if (arg[6] != '=') break;
- cost_mux16 = atoi(arg.substr(6).c_str());
+ cost_mux16 = atoi(arg.substr(7).c_str());
}
continue;
}