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-rw-r--r--frontends/verific/verific.cc1
1 files changed, 0 insertions, 1 deletions
diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc
index 5a75b52af..47020f105 100644
--- a/frontends/verific/verific.cc
+++ b/frontends/verific/verific.cc
@@ -1143,7 +1143,6 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::se
module->memories[memory->name] = memory;
int number_of_bits = net->Size();
- number_of_bits = 1 << ceil_log2(number_of_bits);
int bits_in_word = number_of_bits;
FOREACH_PORTREF_OF_NET(net, si, pr) {
if (pr->GetInst()->Type() == OPER_READ_PORT) {