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author | Eddie Hung <eddie@fpgeh.com> | 2020-05-14 09:45:54 -0700 |
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committer | GitHub <noreply@github.com> | 2020-05-14 09:45:54 -0700 |
commit | 5bcde7ccc331e575682823222c97cc414bb3d808 (patch) | |
tree | 07405fdd0d0652ad75bb881ef67fa66a5e3315a3 /tests/verilog/bug2042.ys | |
parent | f02e20907e5d0f343c83ed1a762a39299105167e (diff) | |
parent | 56a5b1d2daf1b244990d81f32183034071ebd185 (diff) | |
download | yosys-5bcde7ccc331e575682823222c97cc414bb3d808.tar.gz yosys-5bcde7ccc331e575682823222c97cc414bb3d808.tar.bz2 yosys-5bcde7ccc331e575682823222c97cc414bb3d808.zip |
Merge pull request #2045 from YosysHQ/eddie/fix2042
verilog: error if no direction given for task arguments, default to input in SV mode
Diffstat (limited to 'tests/verilog/bug2042.ys')
-rw-r--r-- | tests/verilog/bug2042.ys | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/tests/verilog/bug2042.ys b/tests/verilog/bug2042.ys new file mode 100644 index 000000000..f9d8e2837 --- /dev/null +++ b/tests/verilog/bug2042.ys @@ -0,0 +1,11 @@ +logger -expect error "task/function argument direction missing" 1 +read_verilog <<EOT +module Task_Test_Top +( +); + + task SomeTaskName(a) + endtask + +endmodule +EOT |