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| author | Marcin Kościelnicki <mwk@0x04.net> | 2020-02-03 18:50:33 +0100 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2020-02-07 01:00:29 +0100 |
| commit | 95c46ccc555769cd9d24bae27e0b7264f06e3d66 (patch) | |
| tree | de5a3e2df77665914d1bd39c7eb01fabf40a480e /techlibs | |
| parent | 1784d25f53abaf4b457e180af49dddca8718d88d (diff) | |
| download | yosys-95c46ccc555769cd9d24bae27e0b7264f06e3d66.tar.gz yosys-95c46ccc555769cd9d24bae27e0b7264f06e3d66.tar.bz2 yosys-95c46ccc555769cd9d24bae27e0b7264f06e3d66.zip | |
xilinx: Add support for Spartan 3A DSP block RAMs.
Part of #1550
Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/xilinx/Makefile.inc | 1 | ||||
| -rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 7 | ||||
| -rw-r--r-- | techlibs/xilinx/xc3sda_brams.txt | 32 |
3 files changed, 39 insertions, 1 deletions
diff --git a/techlibs/xilinx/Makefile.inc b/techlibs/xilinx/Makefile.inc index 3f2fbcc85..60b4ace1c 100644 --- a/techlibs/xilinx/Makefile.inc +++ b/techlibs/xilinx/Makefile.inc @@ -27,6 +27,7 @@ techlibs/xilinx/brams_init_8.vh: techlibs/xilinx/brams_init.mk $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/cells_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/cells_sim.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/cells_xtra.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc3sda_brams.txt)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc6s_brams.txt)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc6s_brams_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc7_xcu_brams.txt)) diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index 5a28bb139..705591cf7 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -438,7 +438,12 @@ struct SynthXilinxPass : public ScriptPass run("memory_bram -rules +/xilinx/{family}_brams.txt"); run("techmap -map +/xilinx/{family}_brams_map.v"); } else if (!nobram) { - if (family == "xc6s") { + if (family == "xc3sda") { + // Supported block RAMs for Spartan 3A DSP are + // a subset of Spartan 6's ones. + run("memory_bram -rules +/xilinx/xc3sda_brams.txt"); + run("techmap -map +/xilinx/xc6s_brams_map.v"); + } else if (family == "xc6s") { run("memory_bram -rules +/xilinx/xc6s_brams.txt"); run("techmap -map +/xilinx/xc6s_brams_map.v"); } else if (family == "xc6v" || family == "xc7") { diff --git a/techlibs/xilinx/xc3sda_brams.txt b/techlibs/xilinx/xc3sda_brams.txt new file mode 100644 index 000000000..fd53a94bf --- /dev/null +++ b/techlibs/xilinx/xc3sda_brams.txt @@ -0,0 +1,32 @@ + +bram $__XILINX_RAMB16BWER_TDP + init 1 + abits 9 @a9d36 + dbits 36 @a9d36 + abits 10 @a10d18 + dbits 18 @a10d18 + abits 11 @a11d9 + dbits 9 @a11d9 + abits 12 @a12d4 + dbits 4 @a12d4 + abits 13 @a13d2 + dbits 2 @a13d2 + abits 14 @a14d1 + dbits 1 @a14d1 + groups 2 + ports 1 1 + wrmode 0 1 + enable 1 4 @a9d36 + enable 1 2 @a10d18 + enable 1 1 @a11d9 @a12d4 @a13d2 @a14d1 + transp 0 0 + clocks 2 3 + clkpol 2 3 +endbram + +match $__XILINX_RAMB16BWER_TDP + min bits 4096 + min efficiency 5 + shuffle_enable B + make_transp +endmatch |