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| author | Eddie Hung <eddie@fpgeh.com> | 2019-08-19 09:56:17 -0700 |
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| committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-19 09:56:17 -0700 |
| commit | d81a090d89d87837d3e18f9c724fe5c89ddf1f64 (patch) | |
| tree | 414787e8cdd565eaf225c3b0a21c56d8d4134697 /techlibs/xilinx/arith_map.v | |
| parent | 5abe133323b2a6a46959f796c4730b2d70cdea26 (diff) | |
| download | yosys-d81a090d89d87837d3e18f9c724fe5c89ddf1f64.tar.gz yosys-d81a090d89d87837d3e18f9c724fe5c89ddf1f64.tar.bz2 yosys-d81a090d89d87837d3e18f9c724fe5c89ddf1f64.zip | |
Unify abc_carry_{in,out} into abc_carry and use port dir, as @mithro
Diffstat (limited to 'techlibs/xilinx/arith_map.v')
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