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author | Dan Ravensloft <dan.ravensloft@gmail.com> | 2020-05-28 11:33:19 +0100 |
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committer | Marcelina KoĆcielnicka <mwk@0x04.net> | 2020-07-04 19:45:10 +0200 |
commit | c6765443fdb57938418fb2b80bf56cda0e7d229b (patch) | |
tree | f5fc653018e45f3a9febd623f4f7cea7823e1906 /techlibs/intel_alm | |
parent | 52fbaeca07a5d8d0a3776d56665dc3bdaadf96b4 (diff) | |
download | yosys-c6765443fdb57938418fb2b80bf56cda0e7d229b.tar.gz yosys-c6765443fdb57938418fb2b80bf56cda0e7d229b.tar.bz2 yosys-c6765443fdb57938418fb2b80bf56cda0e7d229b.zip |
Improve MISTRAL_FF specify rules
Co-authored-by: Eddie Hung <eddie@fpgeh.com>
Diffstat (limited to 'techlibs/intel_alm')
-rw-r--r-- | techlibs/intel_alm/common/dff_sim.v | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/techlibs/intel_alm/common/dff_sim.v b/techlibs/intel_alm/common/dff_sim.v index 38e3d6618..9ff8f9f67 100644 --- a/techlibs/intel_alm/common/dff_sim.v +++ b/techlibs/intel_alm/common/dff_sim.v @@ -79,10 +79,9 @@ module MISTRAL_FF( ); specify - if (ENA) (posedge CLK => (Q : DATAIN)) = `SYNCPATH; - if (ENA) (posedge CLK => (Q : SCLR)) = `SYNCPATH; - if (ENA) (posedge CLK => (Q : SLOAD)) = `SYNCPATH; - if (ENA) (posedge CLK => (Q : SDATA)) = `SYNCPATH; + if (ENA && ACLR !== 1'b0 && !SCLR && !SLOAD) (posedge CLK => (Q : DATAIN)) = `SYNCPATH; + if (ENA && SCLR) (posedge CLK => (Q : 1'b0)) = `SYNCPATH; + if (ENA && !SCLR && SLOAD) (posedge CLK => (Q : SDATA)) = `SYNCPATH; $setup(DATAIN, posedge CLK, `SYNCSETUP); $setup(ENA, posedge CLK, `SYNCSETUP); @@ -90,7 +89,7 @@ specify $setup(SLOAD, posedge CLK, `SYNCSETUP); $setup(SDATA, posedge CLK, `SYNCSETUP); - if (!ACLR) (ACLR => Q) = `COMBPATH; + if (ACLR === 1'b0) (ACLR => Q) = `COMBPATH; endspecify initial begin |