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| author | Claire Wolf <clifford@clifford.at> | 2020-01-30 18:03:35 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-01-30 18:03:35 +0100 |
| commit | ffadaddab53305694026833b61def873316a6437 (patch) | |
| tree | b12c2d47feca21fdff340051a8c9df17108a2854 | |
| parent | 1679682fa3ae18282b49452891282901a3548ecc (diff) | |
| parent | 7b445121cc8bafc05b77e29cf316ae44e5e08cb2 (diff) | |
| download | yosys-ffadaddab53305694026833b61def873316a6437.tar.gz yosys-ffadaddab53305694026833b61def873316a6437.tar.bz2 yosys-ffadaddab53305694026833b61def873316a6437.zip | |
Merge pull request #1654 from YosysHQ/eddie/sby_fix69
verific: unflatten struct ports
| -rw-r--r-- | frontends/verific/verific.cc | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index 9274cf5ca..105a8fbd8 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -1891,6 +1891,9 @@ void verific_import(Design *design, const std::map<std::string,std::string> &par if (!verific_error_msg.empty()) log_error("%s\n", verific_error_msg.c_str()); + for (auto nl : nl_todo) + nl->ChangePortBusStructures(1 /* hierarchical */); + VerificExtNets worker; for (auto nl : nl_todo) worker.run(nl); @@ -2470,6 +2473,9 @@ struct VerificPass : public Pass { worker.run(nl); } + for (auto nl : nl_todo) + nl->ChangePortBusStructures(1 /* hierarchical */); + if (!dumpfile.empty()) { VeriWrite veri_writer; veri_writer.WriteFile(dumpfile.c_str(), Netlist::PresentDesign()); |