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author | Eddie Hung <eddie@fpgeh.com> | 2020-01-27 10:15:22 -0800 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2020-01-27 10:15:22 -0800 |
commit | 7b445121cc8bafc05b77e29cf316ae44e5e08cb2 (patch) | |
tree | 8812b2ed883d89473a634a60a05075489dca771d | |
parent | cccc0ae112ffbe9bdf74c6231eee959ecad55f69 (diff) | |
download | yosys-7b445121cc8bafc05b77e29cf316ae44e5e08cb2.tar.gz yosys-7b445121cc8bafc05b77e29cf316ae44e5e08cb2.tar.bz2 yosys-7b445121cc8bafc05b77e29cf316ae44e5e08cb2.zip |
verific: also unflatten for 'hierarchy' flow as per @cliffordwolf
-rw-r--r-- | frontends/verific/verific.cc | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index a8e8a3dc3..105a8fbd8 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -1891,6 +1891,9 @@ void verific_import(Design *design, const std::map<std::string,std::string> &par if (!verific_error_msg.empty()) log_error("%s\n", verific_error_msg.c_str()); + for (auto nl : nl_todo) + nl->ChangePortBusStructures(1 /* hierarchical */); + VerificExtNets worker; for (auto nl : nl_todo) worker.run(nl); |