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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-28 09:49:01 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-28 09:49:01 -0700 |
| commit | 03705f69f4e7fbd19181297cd4de68472a5f4ba3 (patch) | |
| tree | 50268d7744560765f2066f530a2500f84dd35a1d | |
| parent | 3f87575cb6cdace3de8dbe1b494e4d29a478878e (diff) | |
| download | yosys-03705f69f4e7fbd19181297cd4de68472a5f4ba3.tar.gz yosys-03705f69f4e7fbd19181297cd4de68472a5f4ba3.tar.bz2 yosys-03705f69f4e7fbd19181297cd4de68472a5f4ba3.zip | |
Update synth_ice40 -device doc to be relevant for -abc9 only
| -rw-r--r-- | techlibs/ice40/synth_ice40.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index caef420d4..9dd5d81f7 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -38,8 +38,8 @@ struct SynthIce40Pass : public ScriptPass log("This command runs synthesis for iCE40 FPGAs.\n"); log("\n"); log(" -device < hx | lp | u >\n"); - log(" optimise the synthesis netlist for the specified device.\n"); - log(" HX is the default target if no device argument specified.\n"); + log(" relevant only for '-abc9' flow, optimise timing for the specified device.\n"); + log(" default: hx\n"); log("\n"); log(" -top <module>\n"); log(" use the specified module as top module\n"); |