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ice40
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Author
Age
Files
Lines
*
Mark getArchOptions as override in derived classes
Pedro Vanzella
2018-11-13
1
-1
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+1
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ice40: Don't set colbuf bits for 384
David Shah
2018-11-11
1
-0
/
+2
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Merge pull request #93 from YosysHQ/gui_changes
Miodrag Milanović
2018-11-10
1
-2
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+2
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fix grid dimensions for ice40
Miodrag Milanovic
2018-10-27
1
-2
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+2
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ice40: Fix SPRAM and IO globals
David Shah
2018-11-04
1
-0
/
+4
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ice40: Fix PLL DYNAMICDELAY
David Shah
2018-10-27
1
-1
/
+2
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ups, uncomment
Miodrag Milanovic
2018-10-27
1
-2
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+2
*
Fixed pip graphics
Miodrag Milanovic
2018-10-27
1
-4
/
+4
*
Merge pull request #88 from YosysHQ/issue72
Eddie Hung
2018-10-11
1
-6
/
+13
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[ice40] TimingPortClass of LC.O ports without any inputs now TMG_IGNORE
Eddie Hung
2018-09-15
1
-6
/
+13
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Add info message for promoted global nets
Clifford Wolf
2018-10-03
1
-0
/
+2
*
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ice40: Add error for bad PACKAGE_PIN connections
David Shah
2018-10-03
1
-2
/
+13
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Refactor chain finder to its own file
David Shah
2018-09-30
1
-39
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+1
*
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clangformat
David Shah
2018-09-30
8
-28
/
+34
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Merge pull request #79 from YosysHQ/ice40lvds
Clifford Wolf
2018-09-25
8
-13
/
+88
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ice40: LVDS input bitstream support
David Shah
2018-09-24
1
-4
/
+48
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ice40: Tristate IO support fixes
David Shah
2018-09-24
3
-6
/
+10
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ice40: Validity check for LVDS IO
David Shah
2018-09-24
4
-0
/
+29
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ice40: Remove obsolete belType member
David Shah
2018-09-24
3
-3
/
+1
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*
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Merge pull request #76 from YosysHQ/plloutglobal_fix
Clifford Wolf
2018-09-25
2
-2
/
+38
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Added required checks for PLL and fixed messages eol
Miodrag Milanovic
2018-09-19
1
-3
/
+31
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Add needed PLLOUTGLOBAL ports and mapped it properly
Miodrag Milanovic
2018-09-12
2
-0
/
+8
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ice40: Fix carry packer bug
David Shah
2018-09-25
1
-2
/
+2
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Merge pull request #56 from YosysHQ/q3k/issue-55
Serge Bazanski
2018-08-19
2
-12
/
+28
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ice40: make PLL packing more robust
Sergiusz Bazanski
2018-08-19
2
-12
/
+28
*
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Add more missing iCE40 gfx (LP/HX is complete now)
Clifford Wolf
2018-08-19
3
-4
/
+47
*
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Add iCE40 gfx for carry chain pips and LUT cascade pips
Clifford Wolf
2018-08-19
1
-5
/
+43
*
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Fix iCE40 pip gfx for pips on the top edge of a switchbox
Clifford Wolf
2018-08-19
1
-5
/
+5
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Add iCE40 gfx for IO span-4 corners
Clifford Wolf
2018-08-19
3
-3
/
+36
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Add iCE40 gfx for span-4 wires between IO tiles
Clifford Wolf
2018-08-19
5
-7
/
+126
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Merge pull request #47 from YosysHQ/settings_propagate
Clifford Wolf
2018-08-18
4
-16
/
+5
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Save settings and give nicer names to some
Miodrag Milanovic
2018-08-10
2
-3
/
+3
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Use settings for placer1 and router1
Miodrag Milanovic
2018-08-09
2
-13
/
+2
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Add iCE40 gfx for wires connecting fabric tiles and IO tiles
Clifford Wolf
2018-08-18
4
-2
/
+261
*
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Improve iCE40 gfx for IO tiles and RAM tiles
Clifford Wolf
2018-08-18
5
-23
/
+243
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Add ice40 wire attributes (grid position, segment list)
Clifford Wolf
2018-08-18
3
-18
/
+45
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Merge branch 'master' of github.com:YosysHQ/nextpnr into archattr
Clifford Wolf
2018-08-18
1
-4
/
+6
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do not break if there are no nets loaded from sym section
Miodrag Milanovic
2018-08-18
1
-4
/
+6
*
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Add Arch attrs API
Clifford Wolf
2018-08-14
1
-0
/
+18
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Merge remote-tracking branch 'origin/master' into placer_speedup
Eddie Hung
2018-08-10
1
-1
/
+11
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*
Merge pull request #42 from YosysHQ/floorplan
David Shah
2018-08-09
1
-1
/
+11
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Add pip locations
Clifford Wolf
2018-08-09
1
-1
/
+11
*
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Rework Arch::logicCellsCompatible() to take pointer + size, allowing use of s...
Eddie Hung
2018-08-10
3
-17
/
+18
*
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Make containers static
Eddie Hung
2018-08-09
1
-5
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+7
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ice40: Speedup Arch::predictDelay() with pass-by-ref
Eddie Hung
2018-08-08
1
-1
/
+1
*
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Use settings for json and pcf
Miodrag Milanovic
2018-08-08
4
-8
/
+12
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Merge branch 'master' of github.com:YosysHQ/nextpnr into constids
Clifford Wolf
2018-08-08
5
-389
/
+270
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*
Merge pull request #44 from YosysHQ/improve_timing_spec
David Shah
2018-08-08
2
-32
/
+89
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ice40: Add error for unknown cell type when getting timing info
David Shah
2018-08-08
1
-1
/
+3
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Arch API: Removing Arch::isIOCell
David Shah
2018-08-08
2
-4
/
+0
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