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authorClifford Wolf <clifford@clifford.at>2018-08-18 17:17:01 +0200
committerClifford Wolf <clifford@clifford.at>2018-08-18 17:17:01 +0200
commita346793c19f7b14772d6620fa67d8b21cf79ae45 (patch)
tree4f2bd1a6aebd5113210eabd7b165535d77c249a7 /ice40
parent456a83430ac85c23045f95d3fe0c6d380413fe92 (diff)
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Add iCE40 gfx for wires connecting fabric tiles and IO tiles
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'ice40')
-rw-r--r--ice40/chipdb.py7
-rw-r--r--ice40/family.cmake4
-rw-r--r--ice40/gfx.cc104
-rw-r--r--ice40/gfx.h148
4 files changed, 261 insertions, 2 deletions
diff --git a/ice40/chipdb.py b/ice40/chipdb.py
index 5924f74a..a28cba4a 100644
--- a/ice40/chipdb.py
+++ b/ice40/chipdb.py
@@ -218,6 +218,13 @@ gfx_wire_alias("TILE_WIRE_FUNC_GLOBAL_S_R", "TILE_WIRE_IO_GLOBAL_OUTCLK")
gfx_wire_alias("TILE_WIRE_FUNC_GLOBAL_G0", "TILE_WIRE_IO_GLOBAL_LATCH")
+for neigh in "BNL BNR BOT LFT RGT TNL TNR TOP".split():
+ for i in range(8):
+ gfx_wire_alias("TILE_WIRE_NEIGH_OP_%s_%d" % (neigh, i), "TILE_WIRE_LOGIC_OP_%s_%d" % (neigh, i))
+
+# End of GFX aliases
+
+
def read_timings(filename):
db = dict()
with open(filename) as f:
diff --git a/ice40/family.cmake b/ice40/family.cmake
index f558a14d..0e1d36e6 100644
--- a/ice40/family.cmake
+++ b/ice40/family.cmake
@@ -36,7 +36,7 @@ if (MSVC)
set(DEV_GFXH ${CMAKE_CURRENT_SOURCE_DIR}/ice40/gfx.h)
add_custom_command(OUTPUT ${DEV_CC_BBA_DB}
COMMAND ${PYTHON_EXECUTABLE} ${DB_PY} -p ${DEV_CONSTIDS_INC} -g ${DEV_GFXH} ${OPT_FAST} ${OPT_SLOW} ${DEV_TXT_DB} > ${DEV_CC_BBA_DB}
- DEPENDS ${DEV_TXT_DB} ${DB_PY}
+ DEPENDS ${DEV_CONSTIDS_INC} ${DEV_GFXH} ${DEV_TXT_DB} ${DB_PY}
)
add_custom_command(OUTPUT ${DEV_CC_DB}
COMMAND bbasm ${DEV_CC_BBA_DB} ${DEV_CC_DB}
@@ -69,7 +69,7 @@ else()
add_custom_command(OUTPUT ${DEV_CC_BBA_DB}
COMMAND ${PYTHON_EXECUTABLE} ${DB_PY} -p ${DEV_CONSTIDS_INC} -g ${DEV_GFXH} ${OPT_FAST} ${OPT_SLOW} ${DEV_TXT_DB} > ${DEV_CC_BBA_DB}.new
COMMAND mv ${DEV_CC_BBA_DB}.new ${DEV_CC_BBA_DB}
- DEPENDS ${DEV_TXT_DB} ${DB_PY}
+ DEPENDS ${DEV_CONSTIDS_INC} ${DEV_GFXH} ${DEV_TXT_DB} ${DB_PY}
)
add_custom_command(OUTPUT ${DEV_CC_DB}
COMMAND bbasm --c ${DEV_CC_BBA_DB} ${DEV_CC_DB}.new
diff --git a/ice40/gfx.cc b/ice40/gfx.cc
index 11bf29eb..79350ad0 100644
--- a/ice40/gfx.cc
+++ b/ice40/gfx.cc
@@ -339,6 +339,78 @@ void gfxTileWire(std::vector<GraphicElement> &g, int x, int y, GfxTileWireId id,
g.push_back(el);
}
+ // IO Span-4 Wires connecting to fabric
+
+ if (id >= TILE_WIRE_SPAN4_HORZ_0 && id <= TILE_WIRE_SPAN4_HORZ_47) {
+ int idx = id - TILE_WIRE_SPAN4_HORZ_0;
+ float y1 = y + 1.0 - (0.03 + 0.0025 * (48 - (idx ^ 1)));
+
+ el.x1 = x;
+ el.x2 = x + 1.0;
+ el.y1 = y1;
+ el.y2 = y1;
+ g.push_back(el);
+
+ el.x1 = x + main_swbox_x1 + 0.0025 * ((idx ^ 1) + 35);
+ el.x2 = el.x1;
+ el.y1 = y1;
+ el.y2 = y + main_swbox_y2;
+ g.push_back(el);
+ }
+
+ if (id >= TILE_WIRE_SPAN4_VERT_0 && id <= TILE_WIRE_SPAN4_VERT_47) {
+ int idx = id - TILE_WIRE_SPAN4_VERT_0;
+ float x1 = x + 0.03 + 0.0025 * (48 - (idx ^ 1));
+
+ el.x1 = x1;
+ el.x2 = x1;
+ el.y1 = y;
+ el.y2 = y + 1.0;
+ g.push_back(el);
+
+ el.y1 = y + 1.0 - (0.03 + 0.0025 * (270 - (idx ^ 1)));
+ el.y2 = el.y1;
+ el.x1 = x1;
+ el.x2 = x + main_swbox_x1;
+ g.push_back(el);
+ }
+
+ // IO Span-12 Wires connecting to fabric
+
+ if (id >= TILE_WIRE_SPAN12_HORZ_0 && id <= TILE_WIRE_SPAN12_HORZ_23) {
+ int idx = id - TILE_WIRE_SPAN12_HORZ_0;
+ float y1 = y + 1.0 - (0.03 + 0.0025 * (88 - (idx ^ 1)));
+
+ el.x1 = x;
+ el.x2 = x + 1.0;
+ el.y1 = y1;
+ el.y2 = y1;
+ g.push_back(el);
+
+ el.x1 = x + main_swbox_x1 + 0.0025 * ((idx ^ 1) + 5);
+ el.x2 = el.x1;
+ el.y1 = y1;
+ el.y2 = y + main_swbox_y2;
+ g.push_back(el);
+ }
+
+ if (id >= TILE_WIRE_SPAN12_VERT_0 && id <= TILE_WIRE_SPAN12_VERT_23) {
+ int idx = id - TILE_WIRE_SPAN12_VERT_0;
+ float x1 = x + 0.03 + 0.0025 * (88 - (idx ^ 1));
+
+ el.x1 = x1;
+ el.x2 = x1;
+ el.y1 = y;
+ el.y2 = y + 1.0;
+ g.push_back(el);
+
+ el.y1 = y + 1.0 - (0.03 + 0.0025 * (300 - (idx ^ 1)));
+ el.y2 = el.y1;
+ el.x1 = x1;
+ el.x2 = x + main_swbox_x1;
+ g.push_back(el);
+ }
+
// Global2Local
if (id >= TILE_WIRE_GLB2LOCAL_0 && id <= TILE_WIRE_GLB2LOCAL_3) {
@@ -607,6 +679,38 @@ static bool getWireXY_main(GfxTileWireId id, float &x, float &y)
return true;
}
+ // IO Span-4 Wires connecting to fabric
+
+ if (id >= TILE_WIRE_SPAN4_HORZ_0 && id <= TILE_WIRE_SPAN4_HORZ_47) {
+ int idx = id - TILE_WIRE_SPAN4_HORZ_0;
+ x = main_swbox_x1 + 0.0025 * ((idx ^ 1) + 35);
+ y = main_swbox_y2;
+ return true;
+ }
+
+ if (id >= TILE_WIRE_SPAN4_VERT_0 && id <= TILE_WIRE_SPAN4_VERT_47) {
+ int idx = id - TILE_WIRE_SPAN4_VERT_0;
+ y = 1.0 - (0.03 + 0.0025 * (270 - (idx ^ 1)));
+ x = main_swbox_x1;
+ return true;
+ }
+
+ // IO Span-12 Wires connecting to fabric
+
+ if (id >= TILE_WIRE_SPAN12_HORZ_0 && id <= TILE_WIRE_SPAN12_HORZ_23) {
+ int idx = id - TILE_WIRE_SPAN12_HORZ_0;
+ x = main_swbox_x1 + 0.0025 * ((idx ^ 1) + 5);
+ y = main_swbox_y2;
+ return true;
+ }
+
+ if (id >= TILE_WIRE_SPAN12_VERT_0 && id <= TILE_WIRE_SPAN12_VERT_23) {
+ int idx = id - TILE_WIRE_SPAN12_VERT_0;
+ y = 1.0 - (0.03 + 0.0025 * (300 - (idx ^ 1)));
+ x = main_swbox_x1;
+ return true;
+ }
+
// Global2Local
if (id >= TILE_WIRE_GLB2LOCAL_0 && id <= TILE_WIRE_GLB2LOCAL_3) {
diff --git a/ice40/gfx.h b/ice40/gfx.h
index c4af090d..5401a410 100644
--- a/ice40/gfx.h
+++ b/ice40/gfx.h
@@ -516,6 +516,154 @@ enum GfxTileWireId
TILE_WIRE_SP12_H_L_22,
TILE_WIRE_SP12_H_L_23,
+ TILE_WIRE_SPAN4_VERT_0,
+ TILE_WIRE_SPAN4_VERT_1,
+ TILE_WIRE_SPAN4_VERT_2,
+ TILE_WIRE_SPAN4_VERT_3,
+ TILE_WIRE_SPAN4_VERT_4,
+ TILE_WIRE_SPAN4_VERT_5,
+ TILE_WIRE_SPAN4_VERT_6,
+ TILE_WIRE_SPAN4_VERT_7,
+ TILE_WIRE_SPAN4_VERT_8,
+ TILE_WIRE_SPAN4_VERT_9,
+ TILE_WIRE_SPAN4_VERT_10,
+ TILE_WIRE_SPAN4_VERT_11,
+ TILE_WIRE_SPAN4_VERT_12,
+ TILE_WIRE_SPAN4_VERT_13,
+ TILE_WIRE_SPAN4_VERT_14,
+ TILE_WIRE_SPAN4_VERT_15,
+ TILE_WIRE_SPAN4_VERT_16,
+ TILE_WIRE_SPAN4_VERT_17,
+ TILE_WIRE_SPAN4_VERT_18,
+ TILE_WIRE_SPAN4_VERT_19,
+ TILE_WIRE_SPAN4_VERT_20,
+ TILE_WIRE_SPAN4_VERT_21,
+ TILE_WIRE_SPAN4_VERT_22,
+ TILE_WIRE_SPAN4_VERT_23,
+ TILE_WIRE_SPAN4_VERT_24,
+ TILE_WIRE_SPAN4_VERT_25,
+ TILE_WIRE_SPAN4_VERT_26,
+ TILE_WIRE_SPAN4_VERT_27,
+ TILE_WIRE_SPAN4_VERT_28,
+ TILE_WIRE_SPAN4_VERT_29,
+ TILE_WIRE_SPAN4_VERT_30,
+ TILE_WIRE_SPAN4_VERT_31,
+ TILE_WIRE_SPAN4_VERT_32,
+ TILE_WIRE_SPAN4_VERT_33,
+ TILE_WIRE_SPAN4_VERT_34,
+ TILE_WIRE_SPAN4_VERT_35,
+ TILE_WIRE_SPAN4_VERT_36,
+ TILE_WIRE_SPAN4_VERT_37,
+ TILE_WIRE_SPAN4_VERT_38,
+ TILE_WIRE_SPAN4_VERT_39,
+ TILE_WIRE_SPAN4_VERT_40,
+ TILE_WIRE_SPAN4_VERT_41,
+ TILE_WIRE_SPAN4_VERT_42,
+ TILE_WIRE_SPAN4_VERT_43,
+ TILE_WIRE_SPAN4_VERT_44,
+ TILE_WIRE_SPAN4_VERT_45,
+ TILE_WIRE_SPAN4_VERT_46,
+ TILE_WIRE_SPAN4_VERT_47,
+
+ TILE_WIRE_SPAN4_HORZ_0,
+ TILE_WIRE_SPAN4_HORZ_1,
+ TILE_WIRE_SPAN4_HORZ_2,
+ TILE_WIRE_SPAN4_HORZ_3,
+ TILE_WIRE_SPAN4_HORZ_4,
+ TILE_WIRE_SPAN4_HORZ_5,
+ TILE_WIRE_SPAN4_HORZ_6,
+ TILE_WIRE_SPAN4_HORZ_7,
+ TILE_WIRE_SPAN4_HORZ_8,
+ TILE_WIRE_SPAN4_HORZ_9,
+ TILE_WIRE_SPAN4_HORZ_10,
+ TILE_WIRE_SPAN4_HORZ_11,
+ TILE_WIRE_SPAN4_HORZ_12,
+ TILE_WIRE_SPAN4_HORZ_13,
+ TILE_WIRE_SPAN4_HORZ_14,
+ TILE_WIRE_SPAN4_HORZ_15,
+ TILE_WIRE_SPAN4_HORZ_16,
+ TILE_WIRE_SPAN4_HORZ_17,
+ TILE_WIRE_SPAN4_HORZ_18,
+ TILE_WIRE_SPAN4_HORZ_19,
+ TILE_WIRE_SPAN4_HORZ_20,
+ TILE_WIRE_SPAN4_HORZ_21,
+ TILE_WIRE_SPAN4_HORZ_22,
+ TILE_WIRE_SPAN4_HORZ_23,
+ TILE_WIRE_SPAN4_HORZ_24,
+ TILE_WIRE_SPAN4_HORZ_25,
+ TILE_WIRE_SPAN4_HORZ_26,
+ TILE_WIRE_SPAN4_HORZ_27,
+ TILE_WIRE_SPAN4_HORZ_28,
+ TILE_WIRE_SPAN4_HORZ_29,
+ TILE_WIRE_SPAN4_HORZ_30,
+ TILE_WIRE_SPAN4_HORZ_31,
+ TILE_WIRE_SPAN4_HORZ_32,
+ TILE_WIRE_SPAN4_HORZ_33,
+ TILE_WIRE_SPAN4_HORZ_34,
+ TILE_WIRE_SPAN4_HORZ_35,
+ TILE_WIRE_SPAN4_HORZ_36,
+ TILE_WIRE_SPAN4_HORZ_37,
+ TILE_WIRE_SPAN4_HORZ_38,
+ TILE_WIRE_SPAN4_HORZ_39,
+ TILE_WIRE_SPAN4_HORZ_40,
+ TILE_WIRE_SPAN4_HORZ_41,
+ TILE_WIRE_SPAN4_HORZ_42,
+ TILE_WIRE_SPAN4_HORZ_43,
+ TILE_WIRE_SPAN4_HORZ_44,
+ TILE_WIRE_SPAN4_HORZ_45,
+ TILE_WIRE_SPAN4_HORZ_46,
+ TILE_WIRE_SPAN4_HORZ_47,
+
+ TILE_WIRE_SPAN12_VERT_0,
+ TILE_WIRE_SPAN12_VERT_1,
+ TILE_WIRE_SPAN12_VERT_2,
+ TILE_WIRE_SPAN12_VERT_3,
+ TILE_WIRE_SPAN12_VERT_4,
+ TILE_WIRE_SPAN12_VERT_5,
+ TILE_WIRE_SPAN12_VERT_6,
+ TILE_WIRE_SPAN12_VERT_7,
+ TILE_WIRE_SPAN12_VERT_8,
+ TILE_WIRE_SPAN12_VERT_9,
+ TILE_WIRE_SPAN12_VERT_10,
+ TILE_WIRE_SPAN12_VERT_11,
+ TILE_WIRE_SPAN12_VERT_12,
+ TILE_WIRE_SPAN12_VERT_13,
+ TILE_WIRE_SPAN12_VERT_14,
+ TILE_WIRE_SPAN12_VERT_15,
+ TILE_WIRE_SPAN12_VERT_16,
+ TILE_WIRE_SPAN12_VERT_17,
+ TILE_WIRE_SPAN12_VERT_18,
+ TILE_WIRE_SPAN12_VERT_19,
+ TILE_WIRE_SPAN12_VERT_20,
+ TILE_WIRE_SPAN12_VERT_21,
+ TILE_WIRE_SPAN12_VERT_22,
+ TILE_WIRE_SPAN12_VERT_23,
+
+ TILE_WIRE_SPAN12_HORZ_0,
+ TILE_WIRE_SPAN12_HORZ_1,
+ TILE_WIRE_SPAN12_HORZ_2,
+ TILE_WIRE_SPAN12_HORZ_3,
+ TILE_WIRE_SPAN12_HORZ_4,
+ TILE_WIRE_SPAN12_HORZ_5,
+ TILE_WIRE_SPAN12_HORZ_6,
+ TILE_WIRE_SPAN12_HORZ_7,
+ TILE_WIRE_SPAN12_HORZ_8,
+ TILE_WIRE_SPAN12_HORZ_9,
+ TILE_WIRE_SPAN12_HORZ_10,
+ TILE_WIRE_SPAN12_HORZ_11,
+ TILE_WIRE_SPAN12_HORZ_12,
+ TILE_WIRE_SPAN12_HORZ_13,
+ TILE_WIRE_SPAN12_HORZ_14,
+ TILE_WIRE_SPAN12_HORZ_15,
+ TILE_WIRE_SPAN12_HORZ_16,
+ TILE_WIRE_SPAN12_HORZ_17,
+ TILE_WIRE_SPAN12_HORZ_18,
+ TILE_WIRE_SPAN12_HORZ_19,
+ TILE_WIRE_SPAN12_HORZ_20,
+ TILE_WIRE_SPAN12_HORZ_21,
+ TILE_WIRE_SPAN12_HORZ_22,
+ TILE_WIRE_SPAN12_HORZ_23,
+
TILE_WIRE_PLLIN,
TILE_WIRE_PLLOUT_A,
TILE_WIRE_PLLOUT_B