iCE40/nextpnr - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Fix small isses and code formatting	Maciej Dudek	2021-09-27	1	-11/+7
*	Change Cluster placement algorithm	Maciej Dudek	2021-09-23	1	-0/+9
*	Adding MacroCell placement	Maciej Dudek	2021-09-23	1	-2/+2
*	Adding support for MacroCells	Maciej Dudek	2021-09-23	1	-1/+40
*	interchange: disallow placing cells on sites with clusters	Alessandro Comodi	2021-08-27	1	-1/+2
*	[interchange] Update chipdb and python-fpga-interchange versions	Maciej Dudek	2021-07-14	1	-1/+1
*	interchange: update chipdb version	Alessandro Comodi	2021-07-08	1	-1/+1
*	interchange: reduce run-time to check dedicated interconnect	Alessandro Comodi	2021-07-08	1	-0/+1
*	interchange: increase chipinfo version	Alessandro Comodi	2021-06-11	1	-1/+1
*	interchange: add support for generating BEL clusters	Alessandro Comodi	2021-06-11	1	-0/+28
*	interchange: Add macro param map rules to chipdb	gatecat	2021-05-21	1	-0/+24
*	interchange: Add macro data to chipdb	gatecat	2021-05-21	1	-1/+51
*	interchange: Add more global cell info	gatecat	2021-05-07	1	-1/+14
*	interchange: Add wire types to chipdb	gatecat	2021-04-30	1	-1/+17
*	interchange: Add default cell connections to chipdb	gatecat	2021-04-19	1	-1/+24
*	[interchange] Update to v6 of FPGA interchange chipdb.	Keith Rothman	2021-04-01	1	-1/+2
*	[FPGA interchange] Add support for global buffers from chipdb.	Keith Rothman	2021-03-23	1	-2/+7
*	Update FPGA interchange chipdb to v4 with inverter data.	Keith Rothman	2021-03-23	1	-1/+22
*	Update latest version of FPGA interchange schema.	Keith Rothman	2021-03-23	1	-1/+10
*	Add pseudo pip data to chipdb (with schema bump).	Keith Rothman	2021-03-22	1	-1/+2
*	Refactor header structures in FPGA interchange Arch.	Keith Rothman	2021-03-19	1	-0/+310