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Age
Files
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*
ecp5: Working on DSPs
David Shah
2018-10-22
2
-83
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+200
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ecp5: Adding DSP support
David Shah
2018-10-21
3
-1
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+799
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ecp5: Implement ECP5 equivalent of c9059fc
David Shah
2018-10-21
1
-0
/
+9
*
Merge pull request #92 from YosysHQ/python-cmdline
David Shah
2018-10-21
2
-15
/
+41
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common: Allow running Python scripts for all points in flow
David Shah
2018-10-17
2
-15
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+41
*
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Merge pull request #89 from YosysHQ/ecp5_bram
David Shah
2018-10-17
10
-10
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+619
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clangformat
David Shah
2018-10-16
2
-5
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+9
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ecp5: Add support for correct tile naming in all variants
David Shah
2018-10-16
4
-4
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+84
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ecp5: Add DP16KD timing analysis
David Shah
2018-10-16
1
-2
/
+29
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ecp5: Optimise DCC placement
David Shah
2018-10-14
1
-3
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+12
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ecp5: Fix BRAM tile names
David Shah
2018-10-11
1
-1
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+1
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placer: Fix conflicts during constraint legalisation
David Shah
2018-10-11
1
-0
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+6
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ecp5: Fixing BRAM initialisation
David Shah
2018-10-10
1
-4
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+14
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ecp5: Working on BRAM initialisation
David Shah
2018-10-09
3
-0
/
+82
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ecp5: BRAM improvements with constant/inverted inputs
David Shah
2018-10-06
2
-14
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+80
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ecp5: Fixing EBR constant tie-offs
David Shah
2018-10-05
2
-1
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+51
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ecp5: Bitstream gen for DP16KD BRAM
David Shah
2018-10-05
1
-0
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+98
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ecp5: Infrastructure for BRAM bitstream gen
David Shah
2018-10-05
3
-0
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+56
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ecp5: Dummy timing entry for BRAM
David Shah
2018-10-05
1
-0
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+3
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ecp5: Adding constids for blockram
David Shah
2018-10-05
1
-0
/
+118
*
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Recalculate max zoom level depending of arch
Miodrag Milanovic
2018-10-14
2
-7
/
+9
*
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Merge pull request #88 from YosysHQ/issue72
Eddie Hung
2018-10-11
2
-23
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+19
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[timing] Restore and skip false startpoints
Eddie Hung
2018-09-15
1
-17
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+6
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[ice40] TimingPortClass of LC.O ports without any inputs now TMG_IGNORE
Eddie Hung
2018-09-15
1
-6
/
+13
*
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Merge pull request #83 from YosysHQ/ecp5_dram
David Shah
2018-10-03
10
-9
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+329
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ecp5: Negative clock support, general slice improvements
David Shah
2018-10-02
3
-4
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+41
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ecp5: Small DRAM routing fixes
David Shah
2018-10-01
2
-7
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+25
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clangformat
David Shah
2018-10-01
4
-9
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+5
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*
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ecp5: Fix packing of FFs into carry/DRAM slices
David Shah
2018-10-01
1
-4
/
+12
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*
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ecp5: Fix DRAM initialisation
David Shah
2018-10-01
1
-2
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+2
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*
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ecp5: Remove broken DRAM timing arc
David Shah
2018-10-01
1
-2
/
+2
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ecp5: Debugging DRAM packing
David Shah
2018-10-01
5
-6
/
+40
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ecp5: Working on DRAM packing
David Shah
2018-10-01
2
-1
/
+68
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*
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ecp5: Handling of DRAM initialisation and wiring
David Shah
2018-10-01
1
-1
/
+59
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design_utils: Adding some design helper functions
David Shah
2018-10-01
2
-0
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+36
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ecp5: Helper functions for distributed RAM support
David Shah
2018-10-01
4
-0
/
+66
*
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Merge pull request #86 from YosysHQ/ice40globprom_pr
Clifford Wolf
2018-10-03
1
-0
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+2
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Add info message for promoted global nets
Clifford Wolf
2018-10-03
1
-0
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+2
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*
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Merge pull request #85 from YosysHQ/issue84
David Shah
2018-10-03
1
-2
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+13
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*
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ice40: Add error for bad PACKAGE_PIN connections
David Shah
2018-10-03
1
-2
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+13
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*
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Merge pull request #82 from YosysHQ/ecp5_carry
David Shah
2018-10-01
10
-75
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+512
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*
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ecp5: Improve handling of constant CCU2C inputs
David Shah
2018-10-01
1
-9
/
+65
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*
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ecp5: Fix carry feed out
David Shah
2018-09-30
1
-1
/
+1
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*
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ecp5: Improve mixed no-FF/FF placement
David Shah
2018-09-30
4
-30
/
+45
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*
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ecp5: Carry packing fixes
David Shah
2018-09-30
1
-13
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+18
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*
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ecp5: Relative placement and bitstream gen for carries
David Shah
2018-09-30
3
-2
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+37
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ecp5: First stages of carry packing
David Shah
2018-09-30
1
-3
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+63
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*
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ecp5: Add ccu2c_to_slice
David Shah
2018-09-30
3
-12
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+41
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ecp5: Support code for carry chain handling
David Shah
2018-09-30
2
-16
/
+118
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*
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Refactor chain finder to its own file
David Shah
2018-09-30
4
-61
/
+90
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