iCE40/nextpnr - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
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*	nexus: Fix some IO FASM gen	gatecat	2021-03-30	1	-0/+4
*	nexus: Fix LIFCL-17 LRAM FASM	gatecat	2021-03-30	1	-0/+2
*	nexus: Fix default IO config	gatecat	2021-03-29	1	-0/+2
*	Merge pull request #651 from YosysHQ/gatecat/nexus-vcco	gatecat	2021-03-29	1	-3/+51
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\| *	nexus: Fix bank Vcco FASM	gatecat	2021-03-29	1	-3/+51
* \|	nexus: Default HF_OSC_EN to ENABLED	gatecat	2021-03-29	1	-1/+1
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*	Merge pull request #645 from litghost/add_counter_and_ram	gatecat	2021-03-29	23	-337/+1221
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\| *	Update README with latest develpment progress.	Keith Rothman	2021-03-25	2	-146/+39
\| *	interchange: Fix bug in site router where a bad solution isn't remove.	Keith Rothman	2021-03-25	1	-3/+7
\| *	Implement debugging tools for site router.	Keith Rothman	2021-03-25	7	-23/+166
\| *	Add some FIXME's around VCC assumption in LUT logic.	Keith Rothman	2021-03-25	1	-0/+17
\| *	Add targets to generate YAML outputs for DeviceResource files.	Keith Rothman	2021-03-25	1	-0/+22
\| *	Re-work LUT mapping logic to only put VCC pins when required.	Keith Rothman	2021-03-25	5	-104/+174
\| *	Fixup some of the re-mapping logic.	Keith Rothman	2021-03-25	2	-27/+75
\| *	Add initial handling of local site inverters and constant signals.	Keith Rothman	2021-03-25	8	-60/+460
\| *	[FPGA interchange] Small fix to get_net_type.	Keith Rothman	2021-03-25	2	-9/+14
\| *	Enable counter tests and add RAM tests.	Keith Rothman	2021-03-25	6	-2/+284
* \|	Merge pull request #649 from acomodi/add-archcheck-to-all-tests	gatecat	2021-03-26	3	-9/+41
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\| * \|	gh-actions: better yosys caching based on version	Alessandro Comodi	2021-03-26	2	-6/+35
\| * \|	interchange: add archcheck tests to all-device-test target	Alessandro Comodi	2021-03-26	2	-3/+6
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* \|	Merge pull request #650 from YosysHQ/gatecat/nexus-17k-fixes	gatecat	2021-03-26	1	-1/+4
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\| *	nexus: Fix FASM gen for LIFCL-17	gatecat	2021-03-26	1	-1/+4
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*	Merge pull request #648 from YosysHQ/gatecat/nexus-get_pins	gatecat	2021-03-25	1	-7/+56
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\| *	nexus: Add support for get_pins PDC command	gatecat	2021-03-25	1	-7/+56
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*	Merge pull request #628 from acomodi/add-interchange-devices	gatecat	2021-03-25	22	-168/+450
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\| *	gh-actions: use ccache and build tools before running tests	Alessandro Comodi	2021-03-25	2	-40/+105
\| *	gh-actions: interchange: multiple jobs, one for each device	Alessandro Comodi	2021-03-24	4	-8/+17
\| *	interchange: examples: remove unused makefiles	Alessandro Comodi	2021-03-24	2	-99/+0
\| *	interchange: devices: bel_bucket_seeds -> device_config	Alessandro Comodi	2021-03-23	3	-3/+3
\| *	interchange: added boards and group testing across multiple boards	Alessandro Comodi	2021-03-23	10	-45/+155
\| *	gh-actions: remove multi-process arch generation	Alessandro Comodi	2021-03-23	1	-1/+1
\| *	fpga_interchange: add test data for new architectures	Alessandro Comodi	2021-03-23	3	-0/+108
\| *	fpga_interchange: use higher java heap space	Alessandro Comodi	2021-03-23	3	-3/+4
\| *	fpga_interchange: add more devices	Alessandro Comodi	2021-03-23	8	-3/+91
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*	Merge pull request #644 from litghost/add_global_buffers	gatecat	2021-03-23	5	-11/+30
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\| *	[FPGA interchange] Add support for global buffers from chipdb.	Keith Rothman	2021-03-23	5	-11/+30
* \|	Merge pull request #643 from litghost/id_constants	gatecat	2021-03-23	2	-4/+27
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\| * \|	[FPGA interchange] Convert some string constants to IdString.	Keith Rothman	2021-03-23	2	-4/+27
* \| \|	Merge pull request #640 from litghost/inversion_logic	gatecat	2021-03-23	7	-8/+131
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\| * \|	Initial version of inverter logic.	Keith Rothman	2021-03-23	7	-8/+131
* \| \|	Merge pull request #639 from litghost/parameter_iteration	gatecat	2021-03-23	8	-44/+446
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\| *	Update FPGA interchange chipdb to v4 with inverter data.	Keith Rothman	2021-03-23	1	-1/+22
\| *	Use new parameter definition data in FPGA interchange processing.	Keith Rothman	2021-03-23	7	-43/+415
\| *	Update latest version of FPGA interchange schema.	Keith Rothman	2021-03-23	1	-1/+10
* \|	Merge pull request #642 from YosysHQ/gatecat/missing-cell-pin	gatecat	2021-03-23	1	-0/+3
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\| *	interchange: Add nice error for missing cell pins	gatecat	2021-03-23	1	-0/+3
* \|	Merge pull request #641 from litghost/initial_lookahead	gatecat	2021-03-23	15	-13/+2689
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\| *	Initial lookahead for FPGA interchange.	Keith Rothman	2021-03-23	15	-13/+2689
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*	Merge pull request #638 from litghost/fixup_physical_netlist_writer	gatecat	2021-03-22	1	-11/+93
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\| *	Correct some bugs in writing of physical netlist w.r.t. site sources.	Keith Rothman	2021-03-22	1	-11/+93