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authorKeith Rothman <537074+litghost@users.noreply.github.com>2021-03-22 12:42:11 -0700
committerKeith Rothman <537074+litghost@users.noreply.github.com>2021-03-23 09:00:58 -0700
commitaf1fba9f5232706af4ae31ad5b0186b44de03cfa (patch)
tree1088076f209472e26e72541e3664e0c5cf78aaf7
parent4d8dcab1d3fba1799de7eb51be2dd7bd5dd2e53f (diff)
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Update latest version of FPGA interchange schema.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
-rw-r--r--fpga_interchange/chipdb.h11
1 files changed, 10 insertions, 1 deletions
diff --git a/fpga_interchange/chipdb.h b/fpga_interchange/chipdb.h
index 2f82dcc9..78c56471 100644
--- a/fpga_interchange/chipdb.h
+++ b/fpga_interchange/chipdb.h
@@ -34,7 +34,7 @@ NEXTPNR_NAMESPACE_BEGIN
* kExpectedChipInfoVersion
*/
-static constexpr int32_t kExpectedChipInfoVersion = 2;
+static constexpr int32_t kExpectedChipInfoVersion = 3;
// Flattened site indexing.
//
@@ -198,6 +198,14 @@ NPNR_PACKED_STRUCT(struct CellConstraintPOD {
RelSlice<int32_t> states; // State indicies
});
+// Cell parameters metadata
+NPNR_PACKED_STRUCT(struct CellParameterPOD {
+ int32_t cell_type; // constid
+ int32_t parameter; // constid
+ int32_t format; // ParameterFormat enum
+ int32_t default_value; // constid
+});
+
NPNR_PACKED_STRUCT(struct CellBelMapPOD {
RelSlice<CellBelPinPOD> common_pins;
RelSlice<ParameterPinsPOD> parameter_pins;
@@ -218,6 +226,7 @@ NPNR_PACKED_STRUCT(struct CellMapPOD {
RelSlice<CellBelMapPOD> cell_bel_map;
RelSlice<LutCellPOD> lut_cells;
+ RelSlice<CellParameterPOD> cell_parameters;
});
NPNR_PACKED_STRUCT(struct PackagePinPOD {